linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/process_pptables_v1_0.c

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include "pp_debug.h"
#include <linux/module.h>
#include <linux/slab.h>

#include "process_pptables_v1_0.h"
#include "ppatomctrl.h"
#include "atombios.h"
#include "hwmgr.h"
#include "cgs_common.h"
#include "pptable_v1_0.h"

/**
 * set_hw_cap - Private Function used during initialization.
 * @hwmgr: Pointer to the hardware manager.
 * @setIt: A flag indication if the capability should be set (TRUE) or reset (FALSE).
 * @cap: Which capability to set/reset.
 */
static void set_hw_cap(struct pp_hwmgr *hwmgr, bool setIt, enum phm_platform_caps cap)
{}


/**
 * set_platform_caps - Private Function used during initialization.
 * @hwmgr: Pointer to the hardware manager.
 * @powerplay_caps: the bit array (from BIOS) of capability bits.
 * Exception:  the current implementation always returns 1.
 */
static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
{}

/*
 * Private Function to get the PowerPlay Table Address.
 */
static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
{}

static int get_vddc_lookup_table(
		struct pp_hwmgr	*hwmgr,
		phm_ppt_v1_voltage_lookup_table	**lookup_table,
		const ATOM_Tonga_Voltage_Lookup_Table *vddc_lookup_pp_tables,
		uint32_t max_levels
		)
{}

/**
 * get_platform_power_management_table - Private Function used during initialization.
 * Initialize Platform Power Management Parameter table
 * @hwmgr: Pointer to the hardware manager.
 * @atom_ppm_table: Pointer to PPM table in VBIOS
 */
static int get_platform_power_management_table(
		struct pp_hwmgr *hwmgr,
		ATOM_Tonga_PPM_Table *atom_ppm_table)
{}

/**
 * init_dpm_2_parameters - Private Function used during initialization.
 * Initialize TDP limits for DPM2
 * @hwmgr: Pointer to the hardware manager.
 * @powerplay_table: Pointer to the PowerPlay Table.
 */
static int init_dpm_2_parameters(
		struct pp_hwmgr *hwmgr,
		const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
		)
{}

static int get_valid_clk(
		struct pp_hwmgr *hwmgr,
		struct phm_clock_array **clk_table,
		phm_ppt_v1_clock_voltage_dependency_table const *clk_volt_pp_table
		)
{}

static int get_hard_limits(
		struct pp_hwmgr *hwmgr,
		struct phm_clock_and_voltage_limits *limits,
		ATOM_Tonga_Hard_Limit_Table const *limitable
		)
{}

static int get_mclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_mclk_dep_table,
		ATOM_Tonga_MCLK_Dependency_Table const *mclk_dep_table
		)
{}

static int get_sclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_clock_voltage_dependency_table **pp_tonga_sclk_dep_table,
		PPTable_Generic_SubTable_Header const  *sclk_dep_table
		)
{}

static int get_pcie_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_pcie_table **pp_tonga_pcie_table,
		PPTable_Generic_SubTable_Header const *ptable
		)
{}

static int get_cac_tdp_table(
		struct pp_hwmgr *hwmgr,
		struct phm_cac_tdp_table **cac_tdp_table,
		const PPTable_Generic_SubTable_Header * table
		)
{}

static int get_mm_clock_voltage_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_mm_clock_voltage_dependency_table **tonga_mm_table,
		const ATOM_Tonga_MM_Dependency_Table * mm_dependency_table
		)
{}

static int get_gpio_table(struct pp_hwmgr *hwmgr,
		struct phm_ppt_v1_gpio_table **pp_tonga_gpio_table,
		const ATOM_Tonga_GPIO_Table *atom_gpio_table)
{}
/**
 * init_clock_voltage_dependency - Private Function used during initialization.
 * Initialize clock voltage dependency
 * @hwmgr: Pointer to the hardware manager.
 * @powerplay_table: Pointer to the PowerPlay Table.
 */
static int init_clock_voltage_dependency(
		struct pp_hwmgr *hwmgr,
		const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
		)
{}

/**
 * init_over_drive_limits - Retrieves the (signed) Overdrive limits from VBIOS.
 * The max engine clock, memory clock and max temperature come from the firmware info table.
 *
 * The information is placed into the platform descriptor.
 *
 * @hwmgr: source of the VBIOS table and owner of the platform descriptor to be updated.
 * @powerplay_table: the address of the PowerPlay table.
 *
 * Return: 1 as long as the firmware info table was present and of a supported version.
 */
static int init_over_drive_limits(
		struct pp_hwmgr *hwmgr,
		const ATOM_Tonga_POWERPLAYTABLE *powerplay_table)
{}

/**
 * init_thermal_controller - Private Function used during initialization.
 * Inspect the PowerPlay table for obvious signs of corruption.
 * @hwmgr: Pointer to the hardware manager.
 * @powerplay_table: Pointer to the PowerPlay Table.
 * Exception:  This implementation always returns 1.
 */
static int init_thermal_controller(
		struct pp_hwmgr *hwmgr,
		const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
		)
{}

/**
 * check_powerplay_tables - Private Function used during initialization.
 * Inspect the PowerPlay table for obvious signs of corruption.
 * @hwmgr: Pointer to the hardware manager.
 * @powerplay_table: Pointer to the PowerPlay Table.
 * Exception:  2 if the powerplay table is incorrect.
 */
static int check_powerplay_tables(
		struct pp_hwmgr *hwmgr,
		const ATOM_Tonga_POWERPLAYTABLE *powerplay_table
		)
{}

static int pp_tables_v1_0_initialize(struct pp_hwmgr *hwmgr)
{}

static int pp_tables_v1_0_uninitialize(struct pp_hwmgr *hwmgr)
{}

const struct pp_table_func pptable_v1_0_funcs =;

int get_number_of_powerplay_table_entries_v1_0(struct pp_hwmgr *hwmgr)
{}

/*
 * Private function to convert flags stored in the BIOS to software flags in PowerPlay.
 */
static uint32_t make_classification_flags(struct pp_hwmgr *hwmgr,
		uint16_t classification, uint16_t classification2)
{}

static int ppt_get_num_of_vce_state_table_entries_v1_0(struct pp_hwmgr *hwmgr)
{}

static int ppt_get_vce_state_table_entry_v1_0(struct pp_hwmgr *hwmgr, uint32_t i,
		struct amd_vce_state *vce_state, void **clock_info, uint32_t *flag)
{}

/**
 * get_powerplay_table_entry_v1_0 - Create a Power State out of an entry in the PowerPlay table.
 * This function is called by the hardware back-end.
 * @hwmgr: Pointer to the hardware manager.
 * @entry_index: The index of the entry to be extracted from the table.
 * @power_state: The address of the PowerState instance being created.
 * @call_back_func: The function to call into to fill power state
 * Return: -1 if the entry cannot be retrieved.
 */
int get_powerplay_table_entry_v1_0(struct pp_hwmgr *hwmgr,
		uint32_t entry_index, struct pp_power_state *power_state,
		int (*call_back_func)(struct pp_hwmgr *, void *,
				struct pp_power_state *, void *, uint32_t))
{}