linux/arch/x86/include/asm/text-patching.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_TEXT_PATCHING_H
#define _ASM_X86_TEXT_PATCHING_H

#include <linux/types.h>
#include <linux/stddef.h>
#include <asm/ptrace.h>

/*
 * Currently, the max observed size in the kernel code is
 * JUMP_LABEL_NOP_SIZE/RELATIVEJUMP_SIZE, which are 5.
 * Raise it if needed.
 */
#define POKE_MAX_OPCODE_SIZE …

extern void text_poke_early(void *addr, const void *opcode, size_t len);

extern void apply_relocation(u8 *buf, const u8 * const instr, size_t instrlen, u8 *repl, size_t repl_len);

/*
 * Clear and restore the kernel write-protection flag on the local CPU.
 * Allows the kernel to edit read-only pages.
 * Side-effect: any interrupt handler running between save and restore will have
 * the ability to write to read-only pages.
 *
 * Warning:
 * Code patching in the UP case is safe if NMIs and MCE handlers are stopped and
 * no thread can be preempted in the instructions being modified (no iret to an
 * invalid instruction possible) or if the instructions are changed from a
 * consistent state to another consistent state atomically.
 * On the local CPU you need to be protected against NMI or MCE handlers seeing
 * an inconsistent instruction while you patch.
 */
extern void *text_poke(void *addr, const void *opcode, size_t len);
extern void text_poke_sync(void);
extern void *text_poke_kgdb(void *addr, const void *opcode, size_t len);
extern void *text_poke_copy(void *addr, const void *opcode, size_t len);
extern void *text_poke_copy_locked(void *addr, const void *opcode, size_t len, bool core_ok);
extern void *text_poke_set(void *addr, int c, size_t len);
extern int poke_int3_handler(struct pt_regs *regs);
extern void text_poke_bp(void *addr, const void *opcode, size_t len, const void *emulate);

extern void text_poke_queue(void *addr, const void *opcode, size_t len, const void *emulate);
extern void text_poke_finish(void);

#define INT3_INSN_SIZE …
#define INT3_INSN_OPCODE …

#define RET_INSN_SIZE …
#define RET_INSN_OPCODE …

#define CALL_INSN_SIZE …
#define CALL_INSN_OPCODE …

#define JMP32_INSN_SIZE …
#define JMP32_INSN_OPCODE …

#define JMP8_INSN_SIZE …
#define JMP8_INSN_OPCODE …

#define DISP32_SIZE …

static __always_inline int text_opcode_size(u8 opcode)
{ … }

text_poke_insn;

static __always_inline
void __text_gen_insn(void *buf, u8 opcode, const void *addr, const void *dest, int size)
{ … }

static __always_inline
void *text_gen_insn(u8 opcode, const void *addr, const void *dest)
{ … }

extern int after_bootmem;
extern __ro_after_init struct mm_struct *poking_mm;
extern __ro_after_init unsigned long poking_addr;

#ifndef CONFIG_UML_X86
static __always_inline
void int3_emulate_jmp(struct pt_regs *regs, unsigned long ip)
{ … }

static __always_inline
void int3_emulate_push(struct pt_regs *regs, unsigned long val)
{ … }

static __always_inline
unsigned long int3_emulate_pop(struct pt_regs *regs)
{ … }

static __always_inline
void int3_emulate_call(struct pt_regs *regs, unsigned long func)
{ … }

static __always_inline
void int3_emulate_ret(struct pt_regs *regs)
{ … }

static __always_inline
void int3_emulate_jcc(struct pt_regs *regs, u8 cc, unsigned long ip, unsigned long disp)
{ … }

#endif /* !CONFIG_UML_X86 */

#endif /* _ASM_X86_TEXT_PATCHING_H */