#ifndef _SMU7_POWERTUNE_H
#define _SMU7_POWERTUNE_H
#define DIDT_SQ_CTRL0__UNUSED_0_MASK …
#define DIDT_SQ_CTRL0__UNUSED_0__SHIFT …
#define DIDT_TD_CTRL0__UNUSED_0_MASK …
#define DIDT_TD_CTRL0__UNUSED_0__SHIFT …
#define DIDT_TCP_CTRL0__UNUSED_0_MASK …
#define DIDT_TCP_CTRL0__UNUSED_0__SHIFT …
#define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK …
#define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT …
#define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK …
#define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT …
#define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK …
#define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT …
#define POWERCONTAINMENT_FEATURE_DTE …
#define POWERCONTAINMENT_FEATURE_TDCLimit …
#define POWERCONTAINMENT_FEATURE_PkgPwrLimit …
#define ixGC_CAC_CNTL …
#define ixDIDT_SQ_STALL_CTRL …
#define ixDIDT_SQ_TUNING_CTRL …
#define ixDIDT_TD_STALL_CTRL …
#define ixDIDT_TD_TUNING_CTRL …
#define ixDIDT_TCP_STALL_CTRL …
#define ixDIDT_TCP_TUNING_CTRL …
int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr);
int smu7_disable_smc_cac(struct pp_hwmgr *hwmgr);
int smu7_enable_power_containment(struct pp_hwmgr *hwmgr);
int smu7_disable_power_containment(struct pp_hwmgr *hwmgr);
int smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n);
int smu7_power_control_set_level(struct pp_hwmgr *hwmgr);
int smu7_enable_didt_config(struct pp_hwmgr *hwmgr);
int smu7_disable_didt_config(struct pp_hwmgr *hwmgr);
#endif