linux/arch/x86/include/asm/insn.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
#ifndef _ASM_X86_INSN_H
#define _ASM_X86_INSN_H
/*
 * x86 instruction analysis
 *
 * Copyright (C) IBM Corporation, 2009
 */

#include <asm/byteorder.h>
/* insn_attr_t is defined in inat.h */
#include <asm/inat.h> /* __ignore_sync_check__ */

#if defined(__BYTE_ORDER) ? __BYTE_ORDER == __LITTLE_ENDIAN : defined(__LITTLE_ENDIAN)

struct insn_field { … };

static inline void insn_field_set(struct insn_field *p, insn_value_t v,
				  unsigned char n)
{ … }

static inline void insn_set_byte(struct insn_field *p, unsigned char n,
				 insn_byte_t v)
{ … }

#else

struct insn_field {
	insn_value_t value;
	union {
		insn_value_t little;
		insn_byte_t bytes[4];
	};
	/* !0 if we've run insn_get_xxx() for this field */
	unsigned char got;
	unsigned char nbytes;
};

static inline void insn_field_set(struct insn_field *p, insn_value_t v,
				  unsigned char n)
{
	p->value = v;
	p->little = __cpu_to_le32(v);
	p->nbytes = n;
}

static inline void insn_set_byte(struct insn_field *p, unsigned char n,
				 insn_byte_t v)
{
	p->bytes[n] = v;
	p->value = __le32_to_cpu(p->little);
}
#endif

struct insn { … };

#define MAX_INSN_SIZE …

#define X86_MODRM_MOD(modrm) …
#define X86_MODRM_REG(modrm) …
#define X86_MODRM_RM(modrm) …

#define X86_SIB_SCALE(sib) …
#define X86_SIB_INDEX(sib) …
#define X86_SIB_BASE(sib) …

#define X86_REX2_M(rex) …
#define X86_REX2_R(rex) …
#define X86_REX2_X(rex) …
#define X86_REX2_B(rex) …

#define X86_REX_W(rex) …
#define X86_REX_R(rex) …
#define X86_REX_X(rex) …
#define X86_REX_B(rex) …

/* VEX bit flags  */
#define X86_VEX_W(vex) …
#define X86_VEX_R(vex) …
#define X86_VEX_X(vex) …
#define X86_VEX_B(vex) …
#define X86_VEX_L(vex) …
/* VEX bit fields */
#define X86_EVEX_M(vex) …
#define X86_VEX3_M(vex) …
#define X86_VEX2_M …
#define X86_VEX_V(vex) …
#define X86_VEX_P(vex) …
#define X86_VEX_M_MAX …

extern void insn_init(struct insn *insn, const void *kaddr, int buf_len, int x86_64);
extern int insn_get_prefixes(struct insn *insn);
extern int insn_get_opcode(struct insn *insn);
extern int insn_get_modrm(struct insn *insn);
extern int insn_get_sib(struct insn *insn);
extern int insn_get_displacement(struct insn *insn);
extern int insn_get_immediate(struct insn *insn);
extern int insn_get_length(struct insn *insn);

enum insn_mode { … };

extern int insn_decode(struct insn *insn, const void *kaddr, int buf_len, enum insn_mode m);

#define insn_decode_kernel(_insn, _ptr) …

/* Attribute will be determined after getting ModRM (for opcode groups) */
static inline void insn_get_attribute(struct insn *insn)
{ … }

/* Instruction uses RIP-relative addressing */
extern int insn_rip_relative(struct insn *insn);

static inline int insn_is_rex2(struct insn *insn)
{ … }

static inline insn_byte_t insn_rex2_m_bit(struct insn *insn)
{ … }

static inline int insn_is_avx(struct insn *insn)
{ … }

static inline int insn_is_evex(struct insn *insn)
{ … }

static inline int insn_has_emulate_prefix(struct insn *insn)
{ … }

static inline insn_byte_t insn_vex_m_bits(struct insn *insn)
{ … }

static inline insn_byte_t insn_vex_p_bits(struct insn *insn)
{ … }

static inline insn_byte_t insn_vex_w_bit(struct insn *insn)
{ … }

/* Get the last prefix id from last prefix or VEX prefix */
static inline int insn_last_prefix_id(struct insn *insn)
{ … }

/* Offset of each field from kaddr */
static inline int insn_offset_rex_prefix(struct insn *insn)
{ … }
static inline int insn_offset_vex_prefix(struct insn *insn)
{ … }
static inline int insn_offset_opcode(struct insn *insn)
{ … }
static inline int insn_offset_modrm(struct insn *insn)
{ … }
static inline int insn_offset_sib(struct insn *insn)
{ … }
static inline int insn_offset_displacement(struct insn *insn)
{ … }
static inline int insn_offset_immediate(struct insn *insn)
{ … }

/**
 * for_each_insn_prefix() -- Iterate prefixes in the instruction
 * @insn: Pointer to struct insn.
 * @idx:  Index storage.
 * @prefix: Prefix byte.
 *
 * Iterate prefix bytes of given @insn. Each prefix byte is stored in @prefix
 * and the index is stored in @idx (note that this @idx is just for a cursor,
 * do not change it.)
 * Since prefixes.nbytes can be bigger than 4 if some prefixes
 * are repeated, it cannot be used for looping over the prefixes.
 */
#define for_each_insn_prefix(insn, idx, prefix) …

#define POP_SS_OPCODE …
#define MOV_SREG_OPCODE …

/*
 * Intel SDM Vol.3A 6.8.3 states;
 * "Any single-step trap that would be delivered following the MOV to SS
 * instruction or POP to SS instruction (because EFLAGS.TF is 1) is
 * suppressed."
 * This function returns true if @insn is MOV SS or POP SS. On these
 * instructions, single stepping is suppressed.
 */
static inline int insn_masking_exception(struct insn *insn)
{ … }

#endif /* _ASM_X86_INSN_H */