/* * Copyright 2015 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #include "pp_debug.h" #include <linux/module.h> #include <linux/slab.h> #include <linux/delay.h> #include "atom.h" #include "ppatomctrl.h" #include "atombios.h" #include "cgs_common.h" #include "ppevvmath.h" #define MEM_ID_MASK … #define MEM_ID_SHIFT … #define CLOCK_RANGE_MASK … #define CLOCK_RANGE_SHIFT … #define LOW_NIBBLE_MASK … #define DATA_EQU_PREV … #define DATA_FROM_TABLE … voltage_object_info; static int atomctrl_retrieve_ac_timing( uint8_t index, ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) { … } /** * atomctrl_set_mc_reg_address_table - Get memory clock AC timing registers index from VBIOS table * VBIOS set end of memory clock AC timing registers by ucPreRegDataLength bit6 = 1 * @reg_block: the address ATOM_INIT_REG_BLOCK * @table: the address of MCRegTable * Return: 0 */ static int atomctrl_set_mc_reg_address_table( ATOM_INIT_REG_BLOCK *reg_block, pp_atomctrl_mc_reg_table *table) { … } int atomctrl_initialize_mc_reg_table( struct pp_hwmgr *hwmgr, uint8_t module_index, pp_atomctrl_mc_reg_table *table) { … } int atomctrl_initialize_mc_reg_table_v2_2( struct pp_hwmgr *hwmgr, uint8_t module_index, pp_atomctrl_mc_reg_table *table) { … } /* * Set DRAM timings based on engine clock and memory clock. */ int atomctrl_set_engine_dram_timings_rv770( struct pp_hwmgr *hwmgr, uint32_t engine_clock, uint32_t memory_clock) { … } /* * Private Function to get the PowerPlay Table Address. * WARNING: The tabled returned by this function is in * dynamically allocated memory. * The caller has to release if by calling kfree. */ static ATOM_VOLTAGE_OBJECT_INFO *get_voltage_info_table(void *device) { … } static const ATOM_VOLTAGE_OBJECT_V3 *atomctrl_lookup_voltage_type_v3( const ATOM_VOLTAGE_OBJECT_INFO_V3_1 * voltage_object_info_table, uint8_t voltage_type, uint8_t voltage_mode) { … } /** * atomctrl_get_memory_pll_dividers_si * * @hwmgr: input parameter: pointer to HwMgr * @clock_value: input parameter: memory clock * @mpll_param: output parameter: memory clock parameters * @strobe_mode: input parameter: 1 for strobe mode, 0 for performance mode */ int atomctrl_get_memory_pll_dividers_si( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param, bool strobe_mode) { … } /** * atomctrl_get_memory_pll_dividers_vi * * @hwmgr: input parameter: pointer to HwMgr * @clock_value: input parameter: memory clock * @mpll_param: output parameter: memory clock parameters */ int atomctrl_get_memory_pll_dividers_vi(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param *mpll_param) { … } int atomctrl_get_memory_pll_dividers_ai(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_memory_clock_param_ai *mpll_param) { … } int atomctrl_get_engine_pll_dividers_kong(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_kong *dividers) { … } int atomctrl_get_engine_pll_dividers_vi( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_vi *dividers) { … } int atomctrl_get_engine_pll_dividers_ai(struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_ai *dividers) { … } int atomctrl_get_dfs_pll_dividers_vi( struct pp_hwmgr *hwmgr, uint32_t clock_value, pp_atomctrl_clock_dividers_vi *dividers) { … } /* * Get the reference clock in 10KHz */ uint32_t atomctrl_get_reference_clock(struct pp_hwmgr *hwmgr) { … } /* * Returns true if the given voltage type is controlled by GPIO pins. * voltage_type is one of SET_VOLTAGE_TYPE_ASIC_VDDC, * SET_VOLTAGE_TYPE_ASIC_MVDDC, SET_VOLTAGE_TYPE_ASIC_MVDDQ. * voltage_mode is one of ATOM_SET_VOLTAGE, ATOM_SET_VOLTAGE_PHASE */ bool atomctrl_is_voltage_controlled_by_gpio_v3( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode) { … } int atomctrl_get_voltage_table_v3( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t voltage_mode, pp_atomctrl_voltage_table *voltage_table) { … } static bool atomctrl_lookup_gpio_pin( ATOM_GPIO_PIN_LUT * gpio_lookup_table, const uint32_t pinId, pp_atomctrl_gpio_pin_assignment *gpio_pin_assignment) { … } /* * Private Function to get the PowerPlay Table Address. * WARNING: The tabled returned by this function is in * dynamically allocated memory. * The caller has to release if by calling kfree. */ static ATOM_GPIO_PIN_LUT *get_gpio_lookup_table(void *device) { … } /* * Returns 1 if the given pin id find in lookup table. */ bool atomctrl_get_pp_assign_pin( struct pp_hwmgr *hwmgr, const uint32_t pinId, pp_atomctrl_gpio_pin_assignment *gpio_pin_assignment) { … } int atomctrl_calculate_voltage_evv_on_sclk( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage, uint16_t dpm_level, bool debug) { … } /** * atomctrl_get_voltage_evv_on_sclk: gets voltage via call to ATOM COMMAND table. * @hwmgr: input: pointer to hwManager * @voltage_type: input: type of EVV voltage VDDC or VDDGFX * @sclk: input: in 10Khz unit. DPM state SCLK frequency * which is define in PPTable SCLK/VDDC dependence * table associated with this virtual_voltage_Id * @virtual_voltage_Id: input: voltage id which match per voltage DPM state: 0xff01, 0xff02.. 0xff08 * @voltage: output: real voltage level in unit of mv */ int atomctrl_get_voltage_evv_on_sclk( struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage) { … } /** * atomctrl_get_voltage_evv: gets voltage via call to ATOM COMMAND table. * @hwmgr: input: pointer to hwManager * @virtual_voltage_id: input: voltage id which match per voltage DPM state: 0xff01, 0xff02.. 0xff08 * @voltage: output: real voltage level in unit of mv */ int atomctrl_get_voltage_evv(struct pp_hwmgr *hwmgr, uint16_t virtual_voltage_id, uint16_t *voltage) { … } /* * Get the mpll reference clock in 10KHz */ uint32_t atomctrl_get_mpll_reference_clock(struct pp_hwmgr *hwmgr) { … } /* * Get the asic internal spread spectrum table */ static ATOM_ASIC_INTERNAL_SS_INFO *asic_internal_ss_get_ss_table(void *device) { … } bool atomctrl_is_asic_internal_ss_supported(struct pp_hwmgr *hwmgr) { … } /* * Get the asic internal spread spectrum assignment */ static int asic_internal_ss_get_ss_asignment(struct pp_hwmgr *hwmgr, const uint8_t clockSource, const uint32_t clockSpeed, pp_atomctrl_internal_ss_info *ssEntry) { … } /* * Get the memory clock spread spectrum info */ int atomctrl_get_memory_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t memory_clock, pp_atomctrl_internal_ss_info *ssInfo) { … } /* * Get the engine clock spread spectrum info */ int atomctrl_get_engine_clock_spread_spectrum( struct pp_hwmgr *hwmgr, const uint32_t engine_clock, pp_atomctrl_internal_ss_info *ssInfo) { … } int atomctrl_read_efuse(struct pp_hwmgr *hwmgr, uint16_t start_index, uint16_t end_index, uint32_t *efuse) { … } int atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock, uint8_t level) { … } int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage) { … } int atomctrl_get_smc_sclk_range_table(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl_sclk_range_table *table) { … } int atomctrl_get_vddc_shared_railinfo(struct pp_hwmgr *hwmgr, uint8_t *shared_rail) { … } int atomctrl_get_avfs_information(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl__avfs_parameters *param) { … } int atomctrl_get_svi2_info(struct pp_hwmgr *hwmgr, uint8_t voltage_type, uint8_t *svd_gpio_id, uint8_t *svc_gpio_id, uint16_t *load_line) { … } int atomctrl_get_leakage_id_from_efuse(struct pp_hwmgr *hwmgr, uint16_t *virtual_voltage_id) { … } int atomctrl_get_leakage_vddc_base_on_leakage(struct pp_hwmgr *hwmgr, uint16_t *vddc, uint16_t *vddci, uint16_t virtual_voltage_id, uint16_t efuse_voltage_id) { … } void atomctrl_get_voltage_range(struct pp_hwmgr *hwmgr, uint32_t *max_vddc, uint32_t *min_vddc) { … } int atomctrl_get_edc_hilo_leakage_offset_table(struct pp_hwmgr *hwmgr, AtomCtrl_HiLoLeakageOffsetTable *table) { … } static AtomCtrl_EDCLeakgeTable *get_edc_leakage_table(struct pp_hwmgr *hwmgr, uint16_t offset) { … } int atomctrl_get_edc_leakage_table(struct pp_hwmgr *hwmgr, AtomCtrl_EDCLeakgeTable *table, uint16_t offset) { … }
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