#ifndef SMU10_HWMGR_H
#define SMU10_HWMGR_H
#include "hwmgr.h"
#include "smu10_inc.h"
#include "smu10_driver_if.h"
#include "rv_ppsmc.h"
#define SMU10_MAX_HARDWARE_POWERLEVELS …
#define SMU10_DYNCLK_NUMBER_OF_TREND_COEFFICIENTS …
#define DPMFlags_SCLK_Enabled …
#define DPMFlags_UVD_Enabled …
#define DPMFlags_VCE_Enabled …
#define DPMFlags_ACP_Enabled …
#define DPMFlags_ForceHighestValid …
#define SMU_EnabledFeatureScoreboard_AcpDpmOn …
#define SMU_EnabledFeatureScoreboard_SclkDpmOn …
#define SMU_EnabledFeatureScoreboard_UvdDpmOn …
#define SMU_EnabledFeatureScoreboard_VceDpmOn …
#define SMU_PHYID_SHIFT …
#define SMU10_PCIE_POWERGATING_TARGET_GFX …
#define SMU10_PCIE_POWERGATING_TARGET_DDI …
#define SMU10_PCIE_POWERGATING_TARGET_PLLCASCADE …
#define SMU10_PCIE_POWERGATING_TARGET_PHY …
enum VQ_TYPE { … };
#define SUSTAINABLE_SCLK_MASK …
#define SUSTAINABLE_SCLK_SHIFT …
#define SUSTAINABLE_CU_MASK …
#define SUSTAINABLE_CU_SHIFT …
struct smu10_dpm_entry { … };
struct smu10_power_level { … };
#define SMU10_POWERSTATE_FLAGS_NBPS_FORCEHIGH …
#define SMU10_POWERSTATE_FLAGS_NBPS_LOCKTOHIGH …
#define SMU10_POWERSTATE_FLAGS_NBPS_LOCKTOLOW …
#define SMU10_POWERSTATE_FLAGS_BAPM_DISABLE …
struct smu10_uvd_clocks { … };
struct pp_disable_nbpslo_flags { … };
enum smu10_pstate_previous_action { … };
struct smu10_power_state { … };
#define SMU10_NUM_NBPSTATES …
#define SMU10_NUM_NBPMEMORYCLOCK …
struct smu10_display_phy_info_entry { … };
#define SMU10_MAX_DISPLAYPHY_IDS …
struct smu10_display_phy_info { … };
#define MAX_DISPLAY_CLOCK_LEVEL …
struct smu10_system_info{ … };
#define MAX_REGULAR_DPM_NUMBER …
struct smu10_mclk_latency_entries { … };
struct smu10_mclk_latency_table { … };
struct smu10_clock_voltage_dependency_record { … };
struct smu10_voltage_dependency_table { … };
struct smu10_clock_voltage_information { … };
struct smu10_hwmgr { … };
struct pp_hwmgr;
int smu10_init_function_pointers(struct pp_hwmgr *hwmgr);
#define SMU10_UMD_PSTATE_GFXCLK …
#define SMU10_UMD_PSTATE_SOCCLK …
#define SMU10_UMD_PSTATE_FCLK …
#define SMU10_UMD_PSTATE_VCE …
#define SMU10_UMD_PSTATE_PROFILE_VCE …
#define SMU10_UMD_PSTATE_PEAK_SOCCLK …
#define SMU10_UMD_PSTATE_PEAK_FCLK …
#define SMU10_UMD_PSTATE_MIN_FCLK …
#define SMU10_UMD_PSTATE_MIN_SOCCLK …
#define SMU10_UMD_PSTATE_MIN_VCE …
#endif