linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/vega10_processpptables.c

/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 */
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/slab.h>

#include "vega10_processpptables.h"
#include "ppatomfwctrl.h"
#include "atomfirmware.h"
#include "pp_debug.h"
#include "cgs_common.h"
#include "vega10_pptable.h"

#define NUM_DSPCLK_LEVELS …
#define VEGA10_ENGINECLOCK_HARDMAX …

static void set_hw_cap(struct pp_hwmgr *hwmgr, bool enable,
		enum phm_platform_caps cap)
{ … }

static const void *get_powerplay_table(struct pp_hwmgr *hwmgr)
{ … }

static int check_powerplay_tables(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{ … }

static int set_platform_caps(struct pp_hwmgr *hwmgr, uint32_t powerplay_caps)
{ … }

static int init_thermal_controller(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{ … }

static int init_over_drive_limits(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_mm_clock_voltage_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_mm_clock_voltage_dependency_table **vega10_mm_table,
		const ATOM_Vega10_MM_Dependency_Table *mm_dependency_table)
{ … }

static void get_scl_sda_value(uint8_t line, uint8_t *scl, uint8_t *sda)
{ … }

static int get_tdp_table(
		struct pp_hwmgr *hwmgr,
		struct phm_tdp_table **info_tdp_table,
		const Vega10_PPTable_Generic_SubTable_Header *table)
{ … }

static int get_socclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_clock_voltage_dependency_table **pp_vega10_clk_dep_table,
		const ATOM_Vega10_SOCCLK_Dependency_Table *clk_dep_table)
{ … }

static int get_mclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		phm_ppt_v1_clock_voltage_dependency_table **pp_vega10_mclk_dep_table,
		const ATOM_Vega10_MCLK_Dependency_Table *mclk_dep_table)
{ … }

static int get_gfxclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		struct phm_ppt_v1_clock_voltage_dependency_table
			**pp_vega10_clk_dep_table,
		const ATOM_Vega10_GFXCLK_Dependency_Table *clk_dep_table)
{ … }

static int get_pix_clk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		struct phm_ppt_v1_clock_voltage_dependency_table
			**pp_vega10_clk_dep_table,
		const  ATOM_Vega10_PIXCLK_Dependency_Table *clk_dep_table)
{ … }

static int get_dcefclk_voltage_dependency_table(
		struct pp_hwmgr *hwmgr,
		struct phm_ppt_v1_clock_voltage_dependency_table
			**pp_vega10_clk_dep_table,
		const ATOM_Vega10_DCEFCLK_Dependency_Table *clk_dep_table)
{ … }

static int get_pcie_table(struct pp_hwmgr *hwmgr,
		struct phm_ppt_v1_pcie_table **vega10_pcie_table,
		const Vega10_PPTable_Generic_SubTable_Header *table)
{ … }

static int get_hard_limits(
		struct pp_hwmgr *hwmgr,
		struct phm_clock_and_voltage_limits *limits,
		const ATOM_Vega10_Hard_Limit_Table *limit_table)
{ … }

static int get_valid_clk(
		struct pp_hwmgr *hwmgr,
		struct phm_clock_array **clk_table,
		const phm_ppt_v1_clock_voltage_dependency_table *clk_volt_pp_table)
{ … }

static int init_powerplay_extended_tables(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{ … }

static int get_vddc_lookup_table(
		struct pp_hwmgr	*hwmgr,
		phm_ppt_v1_voltage_lookup_table	**lookup_table,
		const ATOM_Vega10_Voltage_Lookup_Table *vddc_lookup_pp_tables,
		uint32_t max_levels)
{ … }

static int init_dpm_2_parameters(
		struct pp_hwmgr *hwmgr,
		const ATOM_Vega10_POWERPLAYTABLE *powerplay_table)
{ … }

static int vega10_pp_tables_initialize(struct pp_hwmgr *hwmgr)
{ … }

static int vega10_pp_tables_uninitialize(struct pp_hwmgr *hwmgr)
{ … }

const struct pp_table_func vega10_pptable_funcs = …;

int vega10_get_number_of_powerplay_table_entries(struct pp_hwmgr *hwmgr)
{ … }

static uint32_t make_classification_flags(struct pp_hwmgr *hwmgr,
		uint16_t classification, uint16_t classification2)
{ … }

int vega10_get_powerplay_table_entry(struct pp_hwmgr *hwmgr,
		uint32_t entry_index, struct pp_power_state *power_state,
		int (*call_back_func)(struct pp_hwmgr *, void *,
				struct pp_power_state *, void *, uint32_t))
{ … }

int vega10_baco_set_cap(struct pp_hwmgr *hwmgr)
{ … }