linux/arch/x86/coco/core.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Confidential Computing Platform Capability checks
 *
 * Copyright (C) 2021 Advanced Micro Devices, Inc.
 * Copyright (C) 2024 Jason A. Donenfeld <[email protected]>. All Rights Reserved.
 *
 * Author: Tom Lendacky <[email protected]>
 */

#include <linux/export.h>
#include <linux/cc_platform.h>
#include <linux/string.h>
#include <linux/random.h>

#include <asm/archrandom.h>
#include <asm/coco.h>
#include <asm/processor.h>

enum cc_vendor cc_vendor __ro_after_init = …;
u64 cc_mask __ro_after_init;

static struct cc_attr_flags { … } cc_flags;

static bool noinstr intel_cc_platform_has(enum cc_attr attr)
{ … }

/*
 * Handle the SEV-SNP vTOM case where sme_me_mask is zero, and
 * the other levels of SME/SEV functionality, including C-bit
 * based SEV-SNP, are not enabled.
 */
static __maybe_unused __always_inline bool amd_cc_platform_vtom(enum cc_attr attr)
{ … }

/*
 * SME and SEV are very similar but they are not the same, so there are
 * times that the kernel will need to distinguish between SME and SEV. The
 * cc_platform_has() function is used for this.  When a distinction isn't
 * needed, the CC_ATTR_MEM_ENCRYPT attribute can be used.
 *
 * The trampoline code is a good example for this requirement.  Before
 * paging is activated, SME will access all memory as decrypted, but SEV
 * will access all memory as encrypted.  So, when APs are being brought
 * up under SME the trampoline area cannot be encrypted, whereas under SEV
 * the trampoline area must be encrypted.
 */

static bool noinstr amd_cc_platform_has(enum cc_attr attr)
{ … }

bool noinstr cc_platform_has(enum cc_attr attr)
{ … }
EXPORT_SYMBOL_GPL(…);

u64 cc_mkenc(u64 val)
{ … }

u64 cc_mkdec(u64 val)
{ … }
EXPORT_SYMBOL_GPL(…);

static void amd_cc_platform_clear(enum cc_attr attr)
{ … }

void cc_platform_clear(enum cc_attr attr)
{ … }

static void amd_cc_platform_set(enum cc_attr attr)
{ … }

void cc_platform_set(enum cc_attr attr)
{ … }

__init void cc_random_init(void)
{ … }