linux/drivers/gpu/drm/amd/display/dc/dpp/dcn20/dcn20_dpp.h

/* Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DCN20_DPP_H__
#define __DCN20_DPP_H__

#include "dcn10/dcn10_dpp.h"
#include "spl/dc_spl_types.h"
#define TO_DCN20_DPP(dpp)

#define TF_REG_LIST_DCN20_COMMON_UPDATED(id)

#define TF_REG_LIST_DCN20_COMMON(id)

#define TF_REG_LIST_DCN20_COMMON_APPEND(id)

#define TF_REG_LIST_DCN20(id)


#define TF_REG_LIST_SH_MASK_DCN20_UPDATED(mask_sh)


#define TF_REG_LIST_SH_MASK_DCN20_COMMON(mask_sh)


#define TF_REG_LIST_SH_MASK_DCN20(mask_sh)

/* DPP CM debug status register:
 *
 *		Status index including current ICSC, Gamut Remap Mode is 9
 *			ICSC Mode: [4..3]
 *			Gamut Remap Mode: [10..9]
 */
#define CM_TEST_DEBUG_DATA_STATUS_IDX

#define TF_DEBUG_REG_LIST_SH_DCN20

#define TF_DEBUG_REG_LIST_MASK_DCN20

#define TF_REG_FIELD_LIST_DCN2_0(type)


struct dcn2_dpp_shift {};

struct dcn2_dpp_mask {};

#define DPP_DCN2_REG_VARIABLE_LIST

#define DPP_DCN2_REG_VARIABLE_LIST_CM_APPEND

struct dcn2_dpp_registers {};

struct dcn20_dpp {};

enum dcn20_input_csc_select {};

enum dcn20_gamut_remap_select {};

void dpp20_read_state(struct dpp *dpp_base,
		struct dcn_dpp_state *s);

void dpp2_set_degamma_pwl(
		struct dpp *dpp_base,
		const struct pwl_params *params);

void dpp2_set_degamma(
		struct dpp *dpp_base,
		enum ipp_degamma_mode mode);

void dpp2_cm_set_gamut_remap(
	struct dpp *dpp_base,
	const struct dpp_grph_csc_adjustment *adjust);

void dpp2_program_input_csc(
		struct dpp *dpp_base,
		enum dc_color_space color_space,
		enum dcn20_input_csc_select input_select,
		const struct out_csc_color_matrix *tbl_entry);

bool dpp20_program_blnd_lut(
	struct dpp *dpp_base, const struct pwl_params *params);

bool dpp20_program_shaper(
		struct dpp *dpp_base,
		const struct pwl_params *params);

bool dpp20_program_3dlut(
		struct dpp *dpp_base,
		const struct tetrahedral_params *params);

void dpp2_cnv_set_alpha_keyer(
			struct dpp *dpp_base,
			struct cnv_color_keyer_params *color_keyer);

void dscl2_calc_lb_num_partitions(
			const struct scaler_data *scl_data,
			enum lb_memory_config lb_config,
			int *num_part_y,
			int *num_part_c);

void dscl2_spl_calc_lb_num_partitions(
	bool alpha_en,
	const struct spl_scaler_data *scl_data,
	enum lb_memory_config lb_config,
	int *num_part_y,
	int *num_part_c);

void dpp2_set_cursor_attributes(
		struct dpp *dpp_base,
		struct dc_cursor_attributes *cursor_attributes);

void dpp2_dummy_program_input_lut(
			struct dpp *dpp_base,
			const struct dc_gamma *gamma);

void oppn20_dummy_program_regamma_pwl(
			struct dpp *dpp,
			const struct pwl_params *params,
			enum opp_regamma mode);

void dpp2_set_hdr_multiplier(
		struct dpp *dpp_base,
		uint32_t multiplier);

bool dpp2_construct(struct dcn20_dpp *dpp2,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn2_dpp_registers *tf_regs,
	const struct dcn2_dpp_shift *tf_shift,
	const struct dcn2_dpp_mask *tf_mask);

void dpp2_power_on_obuf(
		struct dpp *dpp_base,
	bool power_on);

void dpp2_cm_get_gamut_remap(struct dpp *dpp_base,
			     struct dpp_grph_csc_adjustment *adjust);
#endif /* __DC_HWSS_DCN20_H__ */