/* * Copyright 2013 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #ifndef __KV_DPM_H__ #define __KV_DPM_H__ #define SMU__NUM_SCLK_DPM_STATE … #define SMU__NUM_MCLK_DPM_LEVELS … #define SMU__NUM_LCLK_DPM_LEVELS … #define SMU__NUM_PCIE_DPM_LEVELS … #include "smu7_fusion.h" #include "ppsmc.h" #define SUMO_MAX_HARDWARE_POWERLEVELS … #define SUMO_MAX_NUMBER_VOLTAGES … struct sumo_vid_mapping_entry { … }; struct sumo_vid_mapping_table { … }; struct sumo_sclk_voltage_mapping_entry { … }; struct sumo_sclk_voltage_mapping_table { … }; #define TRINITY_AT_DFLT … #define KV_NUM_NBPSTATES … enum kv_pt_config_reg_type { … }; struct kv_pt_config_reg { … }; struct kv_lcac_config_values { … }; struct kv_lcac_config_reg { … }; struct kv_pl { … }; struct kv_ps { … }; struct kv_sys_info { … }; struct kv_power_info { … }; /* XXX are these ok? */ #define KV_TEMP_RANGE_MIN … #define KV_TEMP_RANGE_MAX … /* kv_smc.c */ int amdgpu_kv_notify_message_to_smu(struct amdgpu_device *adev, u32 id); int amdgpu_kv_dpm_get_enable_mask(struct amdgpu_device *adev, u32 *enable_mask); int amdgpu_kv_send_msg_to_smc_with_parameter(struct amdgpu_device *adev, PPSMC_Msg msg, u32 parameter); int amdgpu_kv_read_smc_sram_dword(struct amdgpu_device *adev, u32 smc_address, u32 *value, u32 limit); int amdgpu_kv_smc_dpm_enable(struct amdgpu_device *adev, bool enable); int amdgpu_kv_smc_bapm_enable(struct amdgpu_device *adev, bool enable); int amdgpu_kv_copy_bytes_to_smc(struct amdgpu_device *adev, u32 smc_start_address, const u8 *src, u32 byte_count, u32 limit); #endif
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