#include "pp_debug.h"
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/gfp.h>
#include <linux/slab.h>
#include <linux/firmware.h>
#include <linux/reboot.h>
#include "amd_shared.h"
#include "amd_powerplay.h"
#include "power_state.h"
#include "amdgpu.h"
#include "hwmgr.h"
#include "amdgpu_dpm_internal.h"
#include "amdgpu_display.h"
static const struct amd_pm_funcs pp_dpm_funcs;
static int amd_powerplay_create(struct amdgpu_device *adev)
{ … }
static void amd_powerplay_destroy(struct amdgpu_device *adev)
{ … }
static int pp_early_init(void *handle)
{ … }
static void pp_swctf_delayed_work_handler(struct work_struct *work)
{ … }
static int pp_sw_init(void *handle)
{ … }
static int pp_sw_fini(void *handle)
{ … }
static int pp_hw_init(void *handle)
{ … }
static int pp_hw_fini(void *handle)
{ … }
static void pp_reserve_vram_for_smu(struct amdgpu_device *adev)
{ … }
static int pp_late_init(void *handle)
{ … }
static void pp_late_fini(void *handle)
{ … }
static bool pp_is_idle(void *handle)
{ … }
static int pp_wait_for_idle(void *handle)
{ … }
static int pp_sw_reset(void *handle)
{ … }
static int pp_set_powergating_state(void *handle,
enum amd_powergating_state state)
{ … }
static int pp_suspend(void *handle)
{ … }
static int pp_resume(void *handle)
{ … }
static int pp_set_clockgating_state(void *handle,
enum amd_clockgating_state state)
{ … }
static const struct amd_ip_funcs pp_ip_funcs = …;
const struct amdgpu_ip_block_version pp_smu_ip_block = …;
static int pp_dpm_load_fw(void *handle)
{ … }
static int pp_dpm_fw_loading_complete(void *handle)
{ … }
static int pp_set_clockgating_by_smu(void *handle, uint32_t msg_id)
{ … }
static void pp_dpm_en_umd_pstate(struct pp_hwmgr *hwmgr,
enum amd_dpm_forced_level *level)
{ … }
static int pp_dpm_force_performance_level(void *handle,
enum amd_dpm_forced_level level)
{ … }
static enum amd_dpm_forced_level pp_dpm_get_performance_level(
void *handle)
{ … }
static uint32_t pp_dpm_get_sclk(void *handle, bool low)
{ … }
static uint32_t pp_dpm_get_mclk(void *handle, bool low)
{ … }
static void pp_dpm_powergate_vce(void *handle, bool gate)
{ … }
static void pp_dpm_powergate_uvd(void *handle, bool gate)
{ … }
static int pp_dpm_dispatch_tasks(void *handle, enum amd_pp_task task_id,
enum amd_pm_state_type *user_state)
{ … }
static enum amd_pm_state_type pp_dpm_get_current_power_state(void *handle)
{ … }
static int pp_dpm_set_fan_control_mode(void *handle, uint32_t mode)
{ … }
static int pp_dpm_get_fan_control_mode(void *handle, uint32_t *fan_mode)
{ … }
static int pp_dpm_set_fan_speed_pwm(void *handle, uint32_t speed)
{ … }
static int pp_dpm_get_fan_speed_pwm(void *handle, uint32_t *speed)
{ … }
static int pp_dpm_get_fan_speed_rpm(void *handle, uint32_t *rpm)
{ … }
static int pp_dpm_set_fan_speed_rpm(void *handle, uint32_t rpm)
{ … }
static int pp_dpm_get_pp_num_states(void *handle,
struct pp_states_info *data)
{ … }
static int pp_dpm_get_pp_table(void *handle, char **table)
{ … }
static int amd_powerplay_reset(void *handle)
{ … }
static int pp_dpm_set_pp_table(void *handle, const char *buf, size_t size)
{ … }
static int pp_dpm_force_clock_level(void *handle,
enum pp_clock_type type, uint32_t mask)
{ … }
static int pp_dpm_emit_clock_levels(void *handle,
enum pp_clock_type type,
char *buf,
int *offset)
{ … }
static int pp_dpm_print_clock_levels(void *handle,
enum pp_clock_type type, char *buf)
{ … }
static int pp_dpm_get_sclk_od(void *handle)
{ … }
static int pp_dpm_set_sclk_od(void *handle, uint32_t value)
{ … }
static int pp_dpm_get_mclk_od(void *handle)
{ … }
static int pp_dpm_set_mclk_od(void *handle, uint32_t value)
{ … }
static int pp_dpm_read_sensor(void *handle, int idx,
void *value, int *size)
{ … }
static struct amd_vce_state*
pp_dpm_get_vce_clock_state(void *handle, unsigned idx)
{ … }
static int pp_get_power_profile_mode(void *handle, char *buf)
{ … }
static int pp_set_power_profile_mode(void *handle, long *input, uint32_t size)
{ … }
static int pp_set_fine_grain_clk_vol(void *handle, uint32_t type, long *input, uint32_t size)
{ … }
static int pp_odn_edit_dpm_table(void *handle, enum PP_OD_DPM_TABLE_COMMAND type,
long *input, uint32_t size)
{ … }
static int pp_dpm_set_mp1_state(void *handle, enum pp_mp1_state mp1_state)
{ … }
static int pp_dpm_switch_power_profile(void *handle,
enum PP_SMC_POWER_PROFILE type, bool en)
{ … }
static int pp_set_power_limit(void *handle, uint32_t limit)
{ … }
static int pp_get_power_limit(void *handle, uint32_t *limit,
enum pp_power_limit_level pp_limit_level,
enum pp_power_type power_type)
{ … }
static int pp_display_configuration_change(void *handle,
const struct amd_pp_display_configuration *display_config)
{ … }
static int pp_get_display_power_level(void *handle,
struct amd_pp_simple_clock_info *output)
{ … }
static int pp_get_current_clocks(void *handle,
struct amd_pp_clock_info *clocks)
{ … }
static int pp_get_clock_by_type(void *handle, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks)
{ … }
static int pp_get_clock_by_type_with_latency(void *handle,
enum amd_pp_clock_type type,
struct pp_clock_levels_with_latency *clocks)
{ … }
static int pp_get_clock_by_type_with_voltage(void *handle,
enum amd_pp_clock_type type,
struct pp_clock_levels_with_voltage *clocks)
{ … }
static int pp_set_watermarks_for_clocks_ranges(void *handle,
void *clock_ranges)
{ … }
static int pp_display_clock_voltage_request(void *handle,
struct pp_display_clock_request *clock)
{ … }
static int pp_get_display_mode_validation_clocks(void *handle,
struct amd_pp_simple_clock_info *clocks)
{ … }
static int pp_dpm_powergate_mmhub(void *handle)
{ … }
static int pp_dpm_powergate_gfx(void *handle, bool gate)
{ … }
static void pp_dpm_powergate_acp(void *handle, bool gate)
{ … }
static void pp_dpm_powergate_sdma(void *handle, bool gate)
{ … }
static int pp_set_powergating_by_smu(void *handle,
uint32_t block_type, bool gate)
{ … }
static int pp_notify_smu_enable_pwe(void *handle)
{ … }
static int pp_enable_mgpu_fan_boost(void *handle)
{ … }
static int pp_set_min_deep_sleep_dcefclk(void *handle, uint32_t clock)
{ … }
static int pp_set_hard_min_dcefclk_by_freq(void *handle, uint32_t clock)
{ … }
static int pp_set_hard_min_fclk_by_freq(void *handle, uint32_t clock)
{ … }
static int pp_set_active_display_count(void *handle, uint32_t count)
{ … }
static int pp_get_asic_baco_capability(void *handle)
{ … }
static int pp_get_asic_baco_state(void *handle, int *state)
{ … }
static int pp_set_asic_baco_state(void *handle, int state)
{ … }
static int pp_get_ppfeature_status(void *handle, char *buf)
{ … }
static int pp_set_ppfeature_status(void *handle, uint64_t ppfeature_masks)
{ … }
static int pp_asic_reset_mode_2(void *handle)
{ … }
static int pp_smu_i2c_bus_access(void *handle, bool acquire)
{ … }
static int pp_set_df_cstate(void *handle, enum pp_df_cstate state)
{ … }
static int pp_set_xgmi_pstate(void *handle, uint32_t pstate)
{ … }
static ssize_t pp_get_gpu_metrics(void *handle, void **table)
{ … }
static int pp_gfx_state_change_set(void *handle, uint32_t state)
{ … }
static int pp_get_prv_buffer_details(void *handle, void **addr, size_t *size)
{ … }
static void pp_pm_compute_clocks(void *handle)
{ … }
static const struct amd_pm_funcs pp_dpm_funcs = …;