linux/drivers/gpu/drm/amd/display/dc/inc/hw/opp.h

/*
 * Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

/**
 * DOC: overview
 *
 * The Output Plane Processor (OPP) block groups have functions that format
 * pixel streams such that they are suitable for display at the display device.
 * The key functions contained in the OPP are:
 *
 * - Adaptive Backlight Modulation (ABM)
 * - Formatter (FMT) which provide pixel-by-pixel operations for format the
 *   incoming pixel stream.
 * - Output Buffer that provide pixel replication, and overlapping.
 * - Interface between MPC and OPTC.
 * - Clock and reset generation.
 * - CRC generation.
 */

#ifndef __DAL_OPP_H__
#define __DAL_OPP_H__

#include "hw_shared.h"
#include "dc_hw_types.h"
#include "transform.h"
#include "mpc.h"

struct fixed31_32;

/* TODO: Need cleanup */
enum clamping_range {};

struct clamping_and_pixel_encoding_params {};

struct bit_depth_reduction_params {};

enum wide_gamut_regamma_mode {};

struct gamma_pixel {};

enum channel_name {};

struct custom_float_format {};

struct custom_float_value {};

struct hw_x_point {};

struct pwl_float_data_ex {};

enum hw_point_position {};

struct gamma_point {};

struct pixel_gamma_point {};

struct gamma_coefficients {};

/**
 * struct pwl_float_data - Fixed point RGB color
 */
struct pwl_float_data {};

struct mpc_tree_cfg {};

struct output_pixel_processor {};

enum fmt_stereo_action {};

struct opp_grph_csc_adjustment {};

/* Underlay related types */

struct hw_adjustment_range {};

enum ovl_csc_adjust_item {};

enum oppbuf_display_segmentation {};

struct oppbuf_params {};

struct opp_funcs {};

#endif