/* * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include <linux/vmalloc.h> #include <drm/display/drm_dp_helper.h> #include <drm/display/drm_dp_mst_helper.h> #include <drm/drm_atomic.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_fixed.h> #include <drm/drm_edid.h> #include "dm_services.h" #include "amdgpu.h" #include "amdgpu_dm.h" #include "amdgpu_dm_mst_types.h" #include "amdgpu_dm_hdcp.h" #include "dc.h" #include "dm_helpers.h" #include "ddc_service_types.h" #include "dpcd_defs.h" #include "dmub_cmd.h" #if defined(CONFIG_DEBUG_FS) #include "amdgpu_dm_debugfs.h" #endif #include "dc/resource/dcn20/dcn20_resource.h" #define PEAK_FACTOR_X1000 … static ssize_t dm_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg) { … } static void dm_dp_mst_connector_destroy(struct drm_connector *connector) { … } static int amdgpu_dm_mst_connector_late_register(struct drm_connector *connector) { … } static void amdgpu_dm_mst_connector_early_unregister(struct drm_connector *connector) { … } static const struct drm_connector_funcs dm_dp_mst_connector_funcs = …; bool needs_dsc_aux_workaround(struct dc_link *link) { … } #if defined(CONFIG_DRM_AMD_DC_FP) static bool is_synaptics_cascaded_panamera(struct dc_link *link, struct drm_dp_mst_port *port) { … } static bool validate_dsc_caps_on_connector(struct amdgpu_dm_connector *aconnector) { … } #endif static bool retrieve_downstream_port_device(struct amdgpu_dm_connector *aconnector) { … } static int dm_dp_mst_get_modes(struct drm_connector *connector) { … } static struct drm_encoder * dm_mst_atomic_best_encoder(struct drm_connector *connector, struct drm_atomic_state *state) { … } static int dm_dp_mst_detect(struct drm_connector *connector, struct drm_modeset_acquire_ctx *ctx, bool force) { … } static int dm_dp_mst_atomic_check(struct drm_connector *connector, struct drm_atomic_state *state) { … } static const struct drm_connector_helper_funcs dm_dp_mst_connector_helper_funcs = …; static void amdgpu_dm_encoder_destroy(struct drm_encoder *encoder) { … } static const struct drm_encoder_funcs amdgpu_dm_encoder_funcs = …; void dm_dp_create_fake_mst_encoders(struct amdgpu_device *adev) { … } static struct drm_connector * dm_dp_add_mst_connector(struct drm_dp_mst_topology_mgr *mgr, struct drm_dp_mst_port *port, const char *pathprop) { … } void dm_handle_mst_sideband_msg_ready_event( struct drm_dp_mst_topology_mgr *mgr, enum mst_msg_ready_type msg_rdy_type) { … } static void dm_handle_mst_down_rep_msg_ready(struct drm_dp_mst_topology_mgr *mgr) { … } static const struct drm_dp_mst_topology_cbs dm_mst_cbs = …; void amdgpu_dm_initialize_dp_connector(struct amdgpu_display_manager *dm, struct amdgpu_dm_connector *aconnector, int link_index) { … } int dm_mst_get_pbn_divider(struct dc_link *link) { … } struct dsc_mst_fairness_params { … }; #if defined(CONFIG_DRM_AMD_DC_FP) static int kbps_to_peak_pbn(int kbps) { … } static void set_dsc_configs_from_fairness_vars(struct dsc_mst_fairness_params *params, struct dsc_mst_fairness_vars *vars, int count, int k) { … } static int bpp_x16_from_pbn(struct dsc_mst_fairness_params param, int pbn) { … } static int increase_dsc_bpp(struct drm_atomic_state *state, struct drm_dp_mst_topology_state *mst_state, struct dc_link *dc_link, struct dsc_mst_fairness_params *params, struct dsc_mst_fairness_vars *vars, int count, int k) { … } static int try_disable_dsc(struct drm_atomic_state *state, struct dc_link *dc_link, struct dsc_mst_fairness_params *params, struct dsc_mst_fairness_vars *vars, int count, int k) { … } static int compute_mst_dsc_configs_for_link(struct drm_atomic_state *state, struct dc_state *dc_state, struct dc_link *dc_link, struct dsc_mst_fairness_vars *vars, struct drm_dp_mst_topology_mgr *mgr, int *link_vars_start_index) { … } static bool is_dsc_need_re_compute( struct drm_atomic_state *state, struct dc_state *dc_state, struct dc_link *dc_link) { … } int compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, struct dc_state *dc_state, struct dsc_mst_fairness_vars *vars) { … } static int pre_compute_mst_dsc_configs_for_state(struct drm_atomic_state *state, struct dc_state *dc_state, struct dsc_mst_fairness_vars *vars) { … } static int find_crtc_index_in_state_by_stream(struct drm_atomic_state *state, struct dc_stream_state *stream) { … } static bool is_link_to_dschub(struct dc_link *dc_link) { … } static bool is_dsc_precompute_needed(struct drm_atomic_state *state) { … } int pre_validate_dsc(struct drm_atomic_state *state, struct dm_atomic_state **dm_state_ptr, struct dsc_mst_fairness_vars *vars) { … } static unsigned int kbps_from_pbn(unsigned int pbn) { … } static bool is_dsc_common_config_possible(struct dc_stream_state *stream, struct dc_dsc_bw_range *bw_range) { … } #endif #if defined(CONFIG_DRM_AMD_DC_FP) static bool dp_get_link_current_set_bw(struct drm_dp_aux *aux, uint32_t *cur_link_bw) { … } #endif enum dc_status dm_dp_mst_is_port_support_mode( struct amdgpu_dm_connector *aconnector, struct dc_stream_state *stream) { … }
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