linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/dcn10_optc.h

/*
 * Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 *  and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DC_TIMING_GENERATOR_DCN10_H__
#define __DC_TIMING_GENERATOR_DCN10_H__

#include "optc.h"

#define DCN10TG_FROM_TG(tg)

#define TG_COMMON_REG_LIST_DCN(inst)

#define TG_COMMON_REG_LIST_DCN1_0(inst)


struct dcn_optc_registers {};

#define TG_COMMON_MASK_SH_LIST_DCN(mask_sh)

#define TG_COMMON_MASK_SH_LIST_DCN1_0(mask_sh)\

#define TG_REG_FIELD_LIST_DCN1_0(type)

#define V_TOTAL_REGS(type)

#define TG_REG_FIELD_LIST(type)\

#define TG_REG_FIELD_LIST_DCN3_2(type)

#define TG_REG_FIELD_LIST_DCN3_5(type)

#define TG_REG_FIELD_LIST_DCN401(type)


struct dcn_optc_shift {};

struct dcn_optc_mask {};

void dcn10_timing_generator_init(struct optc *optc);

#endif /* __DC_TIMING_GENERATOR_DCN10_H__ */