linux/drivers/gpu/drm/amd/display/dc/dml/dcn31/dcn31_fpu.c

/*
 * Copyright 2019-2021 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "resource.h"
#include "clk_mgr.h"
#include "dcn31/dcn31_resource.h"
#include "dcn315/dcn315_resource.h"
#include "dcn316/dcn316_resource.h"

#include "dml/dcn20/dcn20_fpu.h"
#include "dcn31_fpu.h"

/**
 * DOC: DCN31x FPU manipulation Overview
 *
 * The DCN architecture relies on FPU operations, which require special
 * compilation flags and the use of kernel_fpu_begin/end functions; ideally, we
 * want to avoid spreading FPU access across multiple files. With this idea in
 * mind, this file aims to centralize all DCN3.1.x functions that require FPU
 * access in a single place. Code in this file follows the following code
 * pattern:
 *
 * 1. Functions that use FPU operations should be isolated in static functions.
 * 2. The FPU functions should have the noinline attribute to ensure anything
 *    that deals with FP register is contained within this call.
 * 3. All function that needs to be accessed outside this file requires a
 *    public interface that not uses any FPU reference.
 * 4. Developers **must not** use DC_FP_START/END in this file, but they need
 *    to ensure that the caller invokes it before access any function available
 *    in this file. For this reason, public functions in this file must invoke
 *    dc_assert_fp_enabled();
 */

struct _vcs_dpi_ip_params_st dcn3_1_ip = …;

static struct _vcs_dpi_soc_bounding_box_st dcn3_1_soc = …;

struct _vcs_dpi_ip_params_st dcn3_15_ip = …;

static struct _vcs_dpi_soc_bounding_box_st dcn3_15_soc = …;

struct _vcs_dpi_ip_params_st dcn3_16_ip = …;

static struct _vcs_dpi_soc_bounding_box_st dcn3_16_soc = …;

void dcn31_zero_pipe_dcc_fraction(display_e2e_pipe_params_st *pipes,
				  int pipe_cnt)
{ … }

void dcn31_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)
{ … }

void dcn315_update_soc_for_wm_a(struct dc *dc, struct dc_state *context)
{ … }

void dcn31_calculate_wm_and_dlg_fp(
		struct dc *dc, struct dc_state *context,
		display_e2e_pipe_params_st *pipes,
		int pipe_cnt,
		int vlevel)
{ … }

void dcn31_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
{ … }

void dcn315_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
{ … }

void dcn316_update_bw_bounding_box(struct dc *dc, struct clk_bw_params *bw_params)
{ … }

int dcn_get_max_non_odm_pix_rate_100hz(struct _vcs_dpi_soc_bounding_box_st *soc)
{ … }

int dcn_get_approx_det_segs_required_for_pstate(
		struct _vcs_dpi_soc_bounding_box_st *soc,
		int pix_clk_100hz, int bpp, int seg_size_kb)
{ … }