linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce60/dce60_clk_mgr.c

/*
 * Copyright 2020 Mauro Rossi <[email protected]>
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */


#include "dccg.h"
#include "clk_mgr_internal.h"
#include "dce100/dce_clk_mgr.h"
#include "dce110/dce110_clk_mgr.h"
#include "dce60_clk_mgr.h"
#include "reg_helper.h"
#include "dmcu.h"
#include "core_types.h"
#include "dal_asic_id.h"

/*
 * Currently the register shifts and masks in this file are used for dce60
 * which has no DPREFCLK_CNTL register
 * TODO: remove this when DENTIST_DISPCLK_CNTL
 * is moved to dccg, where it belongs
 */
#include "dce/dce_6_0_d.h"
#include "dce/dce_6_0_sh_mask.h"

#define REG(reg) …

#undef FN
#define FN(reg_name, field_name) …

/* set register offset */
#define SR(reg_name) …

static const struct clk_mgr_registers disp_clk_regs = …;

static const struct clk_mgr_shift disp_clk_shift = …;

static const struct clk_mgr_mask disp_clk_mask = …;


/* Max clock values for each state indexed by "enum clocks_state": */
static const struct state_dependent_clocks dce60_max_clks_by_state[] = …;

static int dce60_get_dp_ref_freq_khz(struct clk_mgr *clk_mgr_base)
{ … }

static void dce60_pplib_apply_display_requirements(
	struct dc *dc,
	struct dc_state *context)
{ … }

static void dce60_update_clocks(struct clk_mgr *clk_mgr_base,
			struct dc_state *context,
			bool safe_to_lower)
{ … }








static struct clk_mgr_funcs dce60_funcs = …;

void dce60_clk_mgr_construct(
		struct dc_context *ctx,
		struct clk_mgr_internal *clk_mgr)
{ … }