linux/drivers/gpu/drm/amd/include/cyan_skillfish_ip_offset.h

/*
 * Copyright (C) 2018  Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */
#ifndef _cyan_skillfish_ip_offset_HEADER
#define _cyan_skillfish_ip_offset_HEADER

#define MAX_INSTANCE
#define MAX_SEGMENT


struct IP_BASE_INSTANCE {} __maybe_unused;

struct IP_BASE {} __maybe_unused;


static const struct IP_BASE ATHUB_BASE            =;
static const struct IP_BASE CLK_BASE            =;
static const struct IP_BASE DF_BASE            =;
static const struct IP_BASE DMU_BASE            =;
static const struct IP_BASE FUSE_BASE            =;
static const struct IP_BASE GC_BASE            =;
static const struct IP_BASE HDP_BASE            =;
static const struct IP_BASE MMHUB_BASE            =;
static const struct IP_BASE MP0_BASE            =;
static const struct IP_BASE MP1_BASE            =;
static const struct IP_BASE NBIO_BASE            =;
static const struct IP_BASE OSSSYS_BASE            =;
static const struct IP_BASE SMUIO_BASE            =;
static const struct IP_BASE THM_BASE            =;
static const struct IP_BASE UMC0_BASE            =;
static const struct IP_BASE UVD0_BASE            =;


#define ATHUB_BASE__INST0_SEG0
#define ATHUB_BASE__INST0_SEG1
#define ATHUB_BASE__INST0_SEG2
#define ATHUB_BASE__INST0_SEG3
#define ATHUB_BASE__INST0_SEG4

#define ATHUB_BASE__INST1_SEG0
#define ATHUB_BASE__INST1_SEG1
#define ATHUB_BASE__INST1_SEG2
#define ATHUB_BASE__INST1_SEG3
#define ATHUB_BASE__INST1_SEG4

#define ATHUB_BASE__INST2_SEG0
#define ATHUB_BASE__INST2_SEG1
#define ATHUB_BASE__INST2_SEG2
#define ATHUB_BASE__INST2_SEG3
#define ATHUB_BASE__INST2_SEG4

#define ATHUB_BASE__INST3_SEG0
#define ATHUB_BASE__INST3_SEG1
#define ATHUB_BASE__INST3_SEG2
#define ATHUB_BASE__INST3_SEG3
#define ATHUB_BASE__INST3_SEG4

#define ATHUB_BASE__INST4_SEG0
#define ATHUB_BASE__INST4_SEG1
#define ATHUB_BASE__INST4_SEG2
#define ATHUB_BASE__INST4_SEG3
#define ATHUB_BASE__INST4_SEG4

#define ATHUB_BASE__INST5_SEG0
#define ATHUB_BASE__INST5_SEG1
#define ATHUB_BASE__INST5_SEG2
#define ATHUB_BASE__INST5_SEG3
#define ATHUB_BASE__INST5_SEG4

#define CLK_BASE__INST0_SEG0
#define CLK_BASE__INST0_SEG1
#define CLK_BASE__INST0_SEG2
#define CLK_BASE__INST0_SEG3
#define CLK_BASE__INST0_SEG4

#define CLK_BASE__INST1_SEG0
#define CLK_BASE__INST1_SEG1
#define CLK_BASE__INST1_SEG2
#define CLK_BASE__INST1_SEG3
#define CLK_BASE__INST1_SEG4

#define CLK_BASE__INST2_SEG0
#define CLK_BASE__INST2_SEG1
#define CLK_BASE__INST2_SEG2
#define CLK_BASE__INST2_SEG3
#define CLK_BASE__INST2_SEG4

#define CLK_BASE__INST3_SEG0
#define CLK_BASE__INST3_SEG1
#define CLK_BASE__INST3_SEG2
#define CLK_BASE__INST3_SEG3
#define CLK_BASE__INST3_SEG4

#define CLK_BASE__INST4_SEG0
#define CLK_BASE__INST4_SEG1
#define CLK_BASE__INST4_SEG2
#define CLK_BASE__INST4_SEG3
#define CLK_BASE__INST4_SEG4

#define CLK_BASE__INST5_SEG0
#define CLK_BASE__INST5_SEG1
#define CLK_BASE__INST5_SEG2
#define CLK_BASE__INST5_SEG3
#define CLK_BASE__INST5_SEG4

#define DF_BASE__INST0_SEG0
#define DF_BASE__INST0_SEG1
#define DF_BASE__INST0_SEG2
#define DF_BASE__INST0_SEG3
#define DF_BASE__INST0_SEG4

#define DF_BASE__INST1_SEG0
#define DF_BASE__INST1_SEG1
#define DF_BASE__INST1_SEG2
#define DF_BASE__INST1_SEG3
#define DF_BASE__INST1_SEG4

#define DF_BASE__INST2_SEG0
#define DF_BASE__INST2_SEG1
#define DF_BASE__INST2_SEG2
#define DF_BASE__INST2_SEG3
#define DF_BASE__INST2_SEG4

#define DF_BASE__INST3_SEG0
#define DF_BASE__INST3_SEG1
#define DF_BASE__INST3_SEG2
#define DF_BASE__INST3_SEG3
#define DF_BASE__INST3_SEG4

#define DF_BASE__INST4_SEG0
#define DF_BASE__INST4_SEG1
#define DF_BASE__INST4_SEG2
#define DF_BASE__INST4_SEG3
#define DF_BASE__INST4_SEG4

#define DF_BASE__INST5_SEG0
#define DF_BASE__INST5_SEG1
#define DF_BASE__INST5_SEG2
#define DF_BASE__INST5_SEG3
#define DF_BASE__INST5_SEG4

#define DMU_BASE__INST0_SEG0
#define DMU_BASE__INST0_SEG1
#define DMU_BASE__INST0_SEG2
#define DMU_BASE__INST0_SEG3
#define DMU_BASE__INST0_SEG4

#define DMU_BASE__INST1_SEG0
#define DMU_BASE__INST1_SEG1
#define DMU_BASE__INST1_SEG2
#define DMU_BASE__INST1_SEG3
#define DMU_BASE__INST1_SEG4

#define DMU_BASE__INST2_SEG0
#define DMU_BASE__INST2_SEG1
#define DMU_BASE__INST2_SEG2
#define DMU_BASE__INST2_SEG3
#define DMU_BASE__INST2_SEG4

#define DMU_BASE__INST3_SEG0
#define DMU_BASE__INST3_SEG1
#define DMU_BASE__INST3_SEG2
#define DMU_BASE__INST3_SEG3
#define DMU_BASE__INST3_SEG4

#define DMU_BASE__INST4_SEG0
#define DMU_BASE__INST4_SEG1
#define DMU_BASE__INST4_SEG2
#define DMU_BASE__INST4_SEG3
#define DMU_BASE__INST4_SEG4

#define DMU_BASE__INST5_SEG0
#define DMU_BASE__INST5_SEG1
#define DMU_BASE__INST5_SEG2
#define DMU_BASE__INST5_SEG3
#define DMU_BASE__INST5_SEG4

#define FUSE_BASE__INST0_SEG0
#define FUSE_BASE__INST0_SEG1
#define FUSE_BASE__INST0_SEG2
#define FUSE_BASE__INST0_SEG3
#define FUSE_BASE__INST0_SEG4

#define FUSE_BASE__INST1_SEG0
#define FUSE_BASE__INST1_SEG1
#define FUSE_BASE__INST1_SEG2
#define FUSE_BASE__INST1_SEG3
#define FUSE_BASE__INST1_SEG4

#define FUSE_BASE__INST2_SEG0
#define FUSE_BASE__INST2_SEG1
#define FUSE_BASE__INST2_SEG2
#define FUSE_BASE__INST2_SEG3
#define FUSE_BASE__INST2_SEG4

#define FUSE_BASE__INST3_SEG0
#define FUSE_BASE__INST3_SEG1
#define FUSE_BASE__INST3_SEG2
#define FUSE_BASE__INST3_SEG3
#define FUSE_BASE__INST3_SEG4

#define FUSE_BASE__INST4_SEG0
#define FUSE_BASE__INST4_SEG1
#define FUSE_BASE__INST4_SEG2
#define FUSE_BASE__INST4_SEG3
#define FUSE_BASE__INST4_SEG4

#define FUSE_BASE__INST5_SEG0
#define FUSE_BASE__INST5_SEG1
#define FUSE_BASE__INST5_SEG2
#define FUSE_BASE__INST5_SEG3
#define FUSE_BASE__INST5_SEG4

#define GC_BASE__INST0_SEG0
#define GC_BASE__INST0_SEG1
#define GC_BASE__INST0_SEG2
#define GC_BASE__INST0_SEG3
#define GC_BASE__INST0_SEG4

#define GC_BASE__INST1_SEG0
#define GC_BASE__INST1_SEG1
#define GC_BASE__INST1_SEG2
#define GC_BASE__INST1_SEG3
#define GC_BASE__INST1_SEG4

#define GC_BASE__INST2_SEG0
#define GC_BASE__INST2_SEG1
#define GC_BASE__INST2_SEG2
#define GC_BASE__INST2_SEG3
#define GC_BASE__INST2_SEG4

#define GC_BASE__INST3_SEG0
#define GC_BASE__INST3_SEG1
#define GC_BASE__INST3_SEG2
#define GC_BASE__INST3_SEG3
#define GC_BASE__INST3_SEG4

#define GC_BASE__INST4_SEG0
#define GC_BASE__INST4_SEG1
#define GC_BASE__INST4_SEG2
#define GC_BASE__INST4_SEG3
#define GC_BASE__INST4_SEG4

#define GC_BASE__INST5_SEG0
#define GC_BASE__INST5_SEG1
#define GC_BASE__INST5_SEG2
#define GC_BASE__INST5_SEG3
#define GC_BASE__INST5_SEG4

#define HDP_BASE__INST0_SEG0
#define HDP_BASE__INST0_SEG1
#define HDP_BASE__INST0_SEG2
#define HDP_BASE__INST0_SEG3
#define HDP_BASE__INST0_SEG4

#define HDP_BASE__INST1_SEG0
#define HDP_BASE__INST1_SEG1
#define HDP_BASE__INST1_SEG2
#define HDP_BASE__INST1_SEG3
#define HDP_BASE__INST1_SEG4

#define HDP_BASE__INST2_SEG0
#define HDP_BASE__INST2_SEG1
#define HDP_BASE__INST2_SEG2
#define HDP_BASE__INST2_SEG3
#define HDP_BASE__INST2_SEG4

#define HDP_BASE__INST3_SEG0
#define HDP_BASE__INST3_SEG1
#define HDP_BASE__INST3_SEG2
#define HDP_BASE__INST3_SEG3
#define HDP_BASE__INST3_SEG4

#define HDP_BASE__INST4_SEG0
#define HDP_BASE__INST4_SEG1
#define HDP_BASE__INST4_SEG2
#define HDP_BASE__INST4_SEG3
#define HDP_BASE__INST4_SEG4

#define HDP_BASE__INST5_SEG0
#define HDP_BASE__INST5_SEG1
#define HDP_BASE__INST5_SEG2
#define HDP_BASE__INST5_SEG3
#define HDP_BASE__INST5_SEG4

#define MMHUB_BASE__INST0_SEG0
#define MMHUB_BASE__INST0_SEG1
#define MMHUB_BASE__INST0_SEG2
#define MMHUB_BASE__INST0_SEG3
#define MMHUB_BASE__INST0_SEG4

#define MMHUB_BASE__INST1_SEG0
#define MMHUB_BASE__INST1_SEG1
#define MMHUB_BASE__INST1_SEG2
#define MMHUB_BASE__INST1_SEG3
#define MMHUB_BASE__INST1_SEG4

#define MMHUB_BASE__INST2_SEG0
#define MMHUB_BASE__INST2_SEG1
#define MMHUB_BASE__INST2_SEG2
#define MMHUB_BASE__INST2_SEG3
#define MMHUB_BASE__INST2_SEG4

#define MMHUB_BASE__INST3_SEG0
#define MMHUB_BASE__INST3_SEG1
#define MMHUB_BASE__INST3_SEG2
#define MMHUB_BASE__INST3_SEG3
#define MMHUB_BASE__INST3_SEG4

#define MMHUB_BASE__INST4_SEG0
#define MMHUB_BASE__INST4_SEG1
#define MMHUB_BASE__INST4_SEG2
#define MMHUB_BASE__INST4_SEG3
#define MMHUB_BASE__INST4_SEG4

#define MMHUB_BASE__INST5_SEG0
#define MMHUB_BASE__INST5_SEG1
#define MMHUB_BASE__INST5_SEG2
#define MMHUB_BASE__INST5_SEG3
#define MMHUB_BASE__INST5_SEG4

#define MP0_BASE__INST0_SEG0
#define MP0_BASE__INST0_SEG1
#define MP0_BASE__INST0_SEG2
#define MP0_BASE__INST0_SEG3
#define MP0_BASE__INST0_SEG4

#define MP0_BASE__INST1_SEG0
#define MP0_BASE__INST1_SEG1
#define MP0_BASE__INST1_SEG2
#define MP0_BASE__INST1_SEG3
#define MP0_BASE__INST1_SEG4

#define MP0_BASE__INST2_SEG0
#define MP0_BASE__INST2_SEG1
#define MP0_BASE__INST2_SEG2
#define MP0_BASE__INST2_SEG3
#define MP0_BASE__INST2_SEG4

#define MP0_BASE__INST3_SEG0
#define MP0_BASE__INST3_SEG1
#define MP0_BASE__INST3_SEG2
#define MP0_BASE__INST3_SEG3
#define MP0_BASE__INST3_SEG4

#define MP0_BASE__INST4_SEG0
#define MP0_BASE__INST4_SEG1
#define MP0_BASE__INST4_SEG2
#define MP0_BASE__INST4_SEG3
#define MP0_BASE__INST4_SEG4

#define MP0_BASE__INST5_SEG0
#define MP0_BASE__INST5_SEG1
#define MP0_BASE__INST5_SEG2
#define MP0_BASE__INST5_SEG3
#define MP0_BASE__INST5_SEG4

#define MP1_BASE__INST0_SEG0
#define MP1_BASE__INST0_SEG1
#define MP1_BASE__INST0_SEG2
#define MP1_BASE__INST0_SEG3
#define MP1_BASE__INST0_SEG4

#define MP1_BASE__INST1_SEG0
#define MP1_BASE__INST1_SEG1
#define MP1_BASE__INST1_SEG2
#define MP1_BASE__INST1_SEG3
#define MP1_BASE__INST1_SEG4

#define MP1_BASE__INST2_SEG0
#define MP1_BASE__INST2_SEG1
#define MP1_BASE__INST2_SEG2
#define MP1_BASE__INST2_SEG3
#define MP1_BASE__INST2_SEG4

#define MP1_BASE__INST3_SEG0
#define MP1_BASE__INST3_SEG1
#define MP1_BASE__INST3_SEG2
#define MP1_BASE__INST3_SEG3
#define MP1_BASE__INST3_SEG4

#define MP1_BASE__INST4_SEG0
#define MP1_BASE__INST4_SEG1
#define MP1_BASE__INST4_SEG2
#define MP1_BASE__INST4_SEG3
#define MP1_BASE__INST4_SEG4

#define MP1_BASE__INST5_SEG0
#define MP1_BASE__INST5_SEG1
#define MP1_BASE__INST5_SEG2
#define MP1_BASE__INST5_SEG3
#define MP1_BASE__INST5_SEG4

#define NBIO_BASE__INST0_SEG0
#define NBIO_BASE__INST0_SEG1
#define NBIO_BASE__INST0_SEG2
#define NBIO_BASE__INST0_SEG3
#define NBIO_BASE__INST0_SEG4

#define NBIO_BASE__INST1_SEG0
#define NBIO_BASE__INST1_SEG1
#define NBIO_BASE__INST1_SEG2
#define NBIO_BASE__INST1_SEG3
#define NBIO_BASE__INST1_SEG4

#define NBIO_BASE__INST2_SEG0
#define NBIO_BASE__INST2_SEG1
#define NBIO_BASE__INST2_SEG2
#define NBIO_BASE__INST2_SEG3
#define NBIO_BASE__INST2_SEG4

#define NBIO_BASE__INST3_SEG0
#define NBIO_BASE__INST3_SEG1
#define NBIO_BASE__INST3_SEG2
#define NBIO_BASE__INST3_SEG3
#define NBIO_BASE__INST3_SEG4

#define NBIO_BASE__INST4_SEG0
#define NBIO_BASE__INST4_SEG1
#define NBIO_BASE__INST4_SEG2
#define NBIO_BASE__INST4_SEG3
#define NBIO_BASE__INST4_SEG4

#define NBIO_BASE__INST5_SEG0
#define NBIO_BASE__INST5_SEG1
#define NBIO_BASE__INST5_SEG2
#define NBIO_BASE__INST5_SEG3
#define NBIO_BASE__INST5_SEG4

#define OSSSYS_BASE__INST0_SEG0
#define OSSSYS_BASE__INST0_SEG1
#define OSSSYS_BASE__INST0_SEG2
#define OSSSYS_BASE__INST0_SEG3
#define OSSSYS_BASE__INST0_SEG4

#define OSSSYS_BASE__INST1_SEG0
#define OSSSYS_BASE__INST1_SEG1
#define OSSSYS_BASE__INST1_SEG2
#define OSSSYS_BASE__INST1_SEG3
#define OSSSYS_BASE__INST1_SEG4

#define OSSSYS_BASE__INST2_SEG0
#define OSSSYS_BASE__INST2_SEG1
#define OSSSYS_BASE__INST2_SEG2
#define OSSSYS_BASE__INST2_SEG3
#define OSSSYS_BASE__INST2_SEG4

#define OSSSYS_BASE__INST3_SEG0
#define OSSSYS_BASE__INST3_SEG1
#define OSSSYS_BASE__INST3_SEG2
#define OSSSYS_BASE__INST3_SEG3
#define OSSSYS_BASE__INST3_SEG4

#define OSSSYS_BASE__INST4_SEG0
#define OSSSYS_BASE__INST4_SEG1
#define OSSSYS_BASE__INST4_SEG2
#define OSSSYS_BASE__INST4_SEG3
#define OSSSYS_BASE__INST4_SEG4

#define OSSSYS_BASE__INST5_SEG0
#define OSSSYS_BASE__INST5_SEG1
#define OSSSYS_BASE__INST5_SEG2
#define OSSSYS_BASE__INST5_SEG3
#define OSSSYS_BASE__INST5_SEG4

#define SMUIO_BASE__INST0_SEG0
#define SMUIO_BASE__INST0_SEG1
#define SMUIO_BASE__INST0_SEG2
#define SMUIO_BASE__INST0_SEG3
#define SMUIO_BASE__INST0_SEG4

#define SMUIO_BASE__INST1_SEG0
#define SMUIO_BASE__INST1_SEG1
#define SMUIO_BASE__INST1_SEG2
#define SMUIO_BASE__INST1_SEG3
#define SMUIO_BASE__INST1_SEG4

#define SMUIO_BASE__INST2_SEG0
#define SMUIO_BASE__INST2_SEG1
#define SMUIO_BASE__INST2_SEG2
#define SMUIO_BASE__INST2_SEG3
#define SMUIO_BASE__INST2_SEG4

#define SMUIO_BASE__INST3_SEG0
#define SMUIO_BASE__INST3_SEG1
#define SMUIO_BASE__INST3_SEG2
#define SMUIO_BASE__INST3_SEG3
#define SMUIO_BASE__INST3_SEG4

#define SMUIO_BASE__INST4_SEG0
#define SMUIO_BASE__INST4_SEG1
#define SMUIO_BASE__INST4_SEG2
#define SMUIO_BASE__INST4_SEG3
#define SMUIO_BASE__INST4_SEG4

#define SMUIO_BASE__INST5_SEG0
#define SMUIO_BASE__INST5_SEG1
#define SMUIO_BASE__INST5_SEG2
#define SMUIO_BASE__INST5_SEG3
#define SMUIO_BASE__INST5_SEG4

#define THM_BASE__INST0_SEG0
#define THM_BASE__INST0_SEG1
#define THM_BASE__INST0_SEG2
#define THM_BASE__INST0_SEG3
#define THM_BASE__INST0_SEG4

#define THM_BASE__INST1_SEG0
#define THM_BASE__INST1_SEG1
#define THM_BASE__INST1_SEG2
#define THM_BASE__INST1_SEG3
#define THM_BASE__INST1_SEG4

#define THM_BASE__INST2_SEG0
#define THM_BASE__INST2_SEG1
#define THM_BASE__INST2_SEG2
#define THM_BASE__INST2_SEG3
#define THM_BASE__INST2_SEG4

#define THM_BASE__INST3_SEG0
#define THM_BASE__INST3_SEG1
#define THM_BASE__INST3_SEG2
#define THM_BASE__INST3_SEG3
#define THM_BASE__INST3_SEG4

#define THM_BASE__INST4_SEG0
#define THM_BASE__INST4_SEG1
#define THM_BASE__INST4_SEG2
#define THM_BASE__INST4_SEG3
#define THM_BASE__INST4_SEG4

#define THM_BASE__INST5_SEG0
#define THM_BASE__INST5_SEG1
#define THM_BASE__INST5_SEG2
#define THM_BASE__INST5_SEG3
#define THM_BASE__INST5_SEG4

#define UMC0_BASE__INST0_SEG0
#define UMC0_BASE__INST0_SEG1
#define UMC0_BASE__INST0_SEG2
#define UMC0_BASE__INST0_SEG3
#define UMC0_BASE__INST0_SEG4

#define UMC0_BASE__INST1_SEG0
#define UMC0_BASE__INST1_SEG1
#define UMC0_BASE__INST1_SEG2
#define UMC0_BASE__INST1_SEG3
#define UMC0_BASE__INST1_SEG4

#define UMC0_BASE__INST2_SEG0
#define UMC0_BASE__INST2_SEG1
#define UMC0_BASE__INST2_SEG2
#define UMC0_BASE__INST2_SEG3
#define UMC0_BASE__INST2_SEG4

#define UMC0_BASE__INST3_SEG0
#define UMC0_BASE__INST3_SEG1
#define UMC0_BASE__INST3_SEG2
#define UMC0_BASE__INST3_SEG3
#define UMC0_BASE__INST3_SEG4

#define UMC0_BASE__INST4_SEG0
#define UMC0_BASE__INST4_SEG1
#define UMC0_BASE__INST4_SEG2
#define UMC0_BASE__INST4_SEG3
#define UMC0_BASE__INST4_SEG4

#define UMC0_BASE__INST5_SEG0
#define UMC0_BASE__INST5_SEG1
#define UMC0_BASE__INST5_SEG2
#define UMC0_BASE__INST5_SEG3
#define UMC0_BASE__INST5_SEG4

#define UVD0_BASE__INST0_SEG0
#define UVD0_BASE__INST0_SEG1
#define UVD0_BASE__INST0_SEG2
#define UVD0_BASE__INST0_SEG3
#define UVD0_BASE__INST0_SEG4

#define UVD0_BASE__INST1_SEG0
#define UVD0_BASE__INST1_SEG1
#define UVD0_BASE__INST1_SEG2
#define UVD0_BASE__INST1_SEG3
#define UVD0_BASE__INST1_SEG4

#define UVD0_BASE__INST2_SEG0
#define UVD0_BASE__INST2_SEG1
#define UVD0_BASE__INST2_SEG2
#define UVD0_BASE__INST2_SEG3
#define UVD0_BASE__INST2_SEG4

#define UVD0_BASE__INST3_SEG0
#define UVD0_BASE__INST3_SEG1
#define UVD0_BASE__INST3_SEG2
#define UVD0_BASE__INST3_SEG3
#define UVD0_BASE__INST3_SEG4

#define UVD0_BASE__INST4_SEG0
#define UVD0_BASE__INST4_SEG1
#define UVD0_BASE__INST4_SEG2
#define UVD0_BASE__INST4_SEG3
#define UVD0_BASE__INST4_SEG4

#define UVD0_BASE__INST5_SEG0
#define UVD0_BASE__INST5_SEG1
#define UVD0_BASE__INST5_SEG2
#define UVD0_BASE__INST5_SEG3
#define UVD0_BASE__INST5_SEG4

#endif