/* * Copyright 2022 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * */ #ifndef _mp_13_0_5_OFFSET_HEADER #define _mp_13_0_5_OFFSET_HEADER // addressBlock: mp_SmuMp0_SmnDec // base address: 0x0 #define regMP0_SMN_C2PMSG_32 … #define regMP0_SMN_C2PMSG_32_BASE_IDX … #define regMP0_SMN_C2PMSG_33 … #define regMP0_SMN_C2PMSG_33_BASE_IDX … #define regMP0_SMN_C2PMSG_34 … #define regMP0_SMN_C2PMSG_34_BASE_IDX … #define regMP0_SMN_C2PMSG_35 … #define regMP0_SMN_C2PMSG_35_BASE_IDX … #define regMP0_SMN_C2PMSG_36 … #define regMP0_SMN_C2PMSG_36_BASE_IDX … #define regMP0_SMN_C2PMSG_37 … #define regMP0_SMN_C2PMSG_37_BASE_IDX … #define regMP0_SMN_C2PMSG_38 … #define regMP0_SMN_C2PMSG_38_BASE_IDX … #define regMP0_SMN_C2PMSG_39 … #define regMP0_SMN_C2PMSG_39_BASE_IDX … #define regMP0_SMN_C2PMSG_40 … #define regMP0_SMN_C2PMSG_40_BASE_IDX … #define regMP0_SMN_C2PMSG_41 … #define regMP0_SMN_C2PMSG_41_BASE_IDX … #define regMP0_SMN_C2PMSG_42 … #define regMP0_SMN_C2PMSG_42_BASE_IDX … #define regMP0_SMN_C2PMSG_43 … #define regMP0_SMN_C2PMSG_43_BASE_IDX … #define regMP0_SMN_C2PMSG_44 … #define regMP0_SMN_C2PMSG_44_BASE_IDX … #define regMP0_SMN_C2PMSG_45 … #define regMP0_SMN_C2PMSG_45_BASE_IDX … #define regMP0_SMN_C2PMSG_46 … #define regMP0_SMN_C2PMSG_46_BASE_IDX … #define regMP0_SMN_C2PMSG_47 … #define regMP0_SMN_C2PMSG_47_BASE_IDX … #define regMP0_SMN_C2PMSG_48 … #define regMP0_SMN_C2PMSG_48_BASE_IDX … #define regMP0_SMN_C2PMSG_49 … #define regMP0_SMN_C2PMSG_49_BASE_IDX … #define regMP0_SMN_C2PMSG_50 … #define regMP0_SMN_C2PMSG_50_BASE_IDX … #define regMP0_SMN_C2PMSG_51 … #define regMP0_SMN_C2PMSG_51_BASE_IDX … #define regMP0_SMN_C2PMSG_52 … #define regMP0_SMN_C2PMSG_52_BASE_IDX … #define regMP0_SMN_C2PMSG_53 … #define regMP0_SMN_C2PMSG_53_BASE_IDX … #define regMP0_SMN_C2PMSG_54 … #define regMP0_SMN_C2PMSG_54_BASE_IDX … #define regMP0_SMN_C2PMSG_55 … #define regMP0_SMN_C2PMSG_55_BASE_IDX … #define regMP0_SMN_C2PMSG_56 … #define regMP0_SMN_C2PMSG_56_BASE_IDX … #define regMP0_SMN_C2PMSG_57 … #define regMP0_SMN_C2PMSG_57_BASE_IDX … #define regMP0_SMN_C2PMSG_58 … #define regMP0_SMN_C2PMSG_58_BASE_IDX … #define regMP0_SMN_C2PMSG_59 … #define regMP0_SMN_C2PMSG_59_BASE_IDX … #define regMP0_SMN_C2PMSG_60 … #define regMP0_SMN_C2PMSG_60_BASE_IDX … #define regMP0_SMN_C2PMSG_61 … #define regMP0_SMN_C2PMSG_61_BASE_IDX … #define regMP0_SMN_C2PMSG_62 … #define regMP0_SMN_C2PMSG_62_BASE_IDX … #define regMP0_SMN_C2PMSG_63 … #define regMP0_SMN_C2PMSG_63_BASE_IDX … #define regMP0_SMN_C2PMSG_64 … #define regMP0_SMN_C2PMSG_64_BASE_IDX … #define regMP0_SMN_C2PMSG_65 … #define regMP0_SMN_C2PMSG_65_BASE_IDX … #define regMP0_SMN_C2PMSG_66 … #define regMP0_SMN_C2PMSG_66_BASE_IDX … #define regMP0_SMN_C2PMSG_67 … #define regMP0_SMN_C2PMSG_67_BASE_IDX … #define regMP0_SMN_C2PMSG_68 … #define regMP0_SMN_C2PMSG_68_BASE_IDX … #define regMP0_SMN_C2PMSG_69 … #define regMP0_SMN_C2PMSG_69_BASE_IDX … #define regMP0_SMN_C2PMSG_70 … #define regMP0_SMN_C2PMSG_70_BASE_IDX … #define regMP0_SMN_C2PMSG_71 … #define regMP0_SMN_C2PMSG_71_BASE_IDX … #define regMP0_SMN_C2PMSG_72 … #define regMP0_SMN_C2PMSG_72_BASE_IDX … #define regMP0_SMN_C2PMSG_73 … #define regMP0_SMN_C2PMSG_73_BASE_IDX … #define regMP0_SMN_C2PMSG_74 … #define regMP0_SMN_C2PMSG_74_BASE_IDX … #define regMP0_SMN_C2PMSG_75 … #define regMP0_SMN_C2PMSG_75_BASE_IDX … #define regMP0_SMN_C2PMSG_76 … #define regMP0_SMN_C2PMSG_76_BASE_IDX … #define regMP0_SMN_C2PMSG_77 … #define regMP0_SMN_C2PMSG_77_BASE_IDX … #define regMP0_SMN_C2PMSG_78 … #define regMP0_SMN_C2PMSG_78_BASE_IDX … #define regMP0_SMN_C2PMSG_79 … #define regMP0_SMN_C2PMSG_79_BASE_IDX … #define regMP0_SMN_C2PMSG_80 … #define regMP0_SMN_C2PMSG_80_BASE_IDX … #define regMP0_SMN_C2PMSG_81 … #define regMP0_SMN_C2PMSG_81_BASE_IDX … #define regMP0_SMN_C2PMSG_82 … #define regMP0_SMN_C2PMSG_82_BASE_IDX … #define regMP0_SMN_C2PMSG_83 … #define regMP0_SMN_C2PMSG_83_BASE_IDX … #define regMP0_SMN_C2PMSG_84 … #define regMP0_SMN_C2PMSG_84_BASE_IDX … #define regMP0_SMN_C2PMSG_85 … #define regMP0_SMN_C2PMSG_85_BASE_IDX … #define regMP0_SMN_C2PMSG_86 … #define regMP0_SMN_C2PMSG_86_BASE_IDX … #define regMP0_SMN_C2PMSG_87 … #define regMP0_SMN_C2PMSG_87_BASE_IDX … #define regMP0_SMN_C2PMSG_88 … #define regMP0_SMN_C2PMSG_88_BASE_IDX … #define regMP0_SMN_C2PMSG_89 … #define regMP0_SMN_C2PMSG_89_BASE_IDX … #define regMP0_SMN_C2PMSG_90 … #define regMP0_SMN_C2PMSG_90_BASE_IDX … #define regMP0_SMN_C2PMSG_91 … #define regMP0_SMN_C2PMSG_91_BASE_IDX … #define regMP0_SMN_C2PMSG_92 … #define regMP0_SMN_C2PMSG_92_BASE_IDX … #define regMP0_SMN_C2PMSG_93 … #define regMP0_SMN_C2PMSG_93_BASE_IDX … #define regMP0_SMN_C2PMSG_94 … #define regMP0_SMN_C2PMSG_94_BASE_IDX … #define regMP0_SMN_C2PMSG_95 … #define regMP0_SMN_C2PMSG_95_BASE_IDX … #define regMP0_SMN_C2PMSG_96 … #define regMP0_SMN_C2PMSG_96_BASE_IDX … #define regMP0_SMN_C2PMSG_97 … #define regMP0_SMN_C2PMSG_97_BASE_IDX … #define regMP0_SMN_C2PMSG_98 … #define regMP0_SMN_C2PMSG_98_BASE_IDX … #define regMP0_SMN_C2PMSG_99 … #define regMP0_SMN_C2PMSG_99_BASE_IDX … #define regMP0_SMN_C2PMSG_100 … #define regMP0_SMN_C2PMSG_100_BASE_IDX … #define regMP0_SMN_C2PMSG_101 … #define regMP0_SMN_C2PMSG_101_BASE_IDX … #define regMP0_SMN_C2PMSG_102 … #define regMP0_SMN_C2PMSG_102_BASE_IDX … #define regMP0_SMN_C2PMSG_103 … #define regMP0_SMN_C2PMSG_103_BASE_IDX … #define regMP0_SMN_IH_CREDIT … #define regMP0_SMN_IH_CREDIT_BASE_IDX … #define regMP0_SMN_IH_SW_INT … #define regMP0_SMN_IH_SW_INT_BASE_IDX … #define regMP0_SMN_IH_SW_INT_CTRL … #define regMP0_SMN_IH_SW_INT_CTRL_BASE_IDX … // addressBlock: mp_SmuMp1_SmnDec // base address: 0x0 #define regMP1_SMN_C2PMSG_32 … #define regMP1_SMN_C2PMSG_32_BASE_IDX … #define regMP1_SMN_C2PMSG_33 … #define regMP1_SMN_C2PMSG_33_BASE_IDX … #define regMP1_SMN_C2PMSG_34 … #define regMP1_SMN_C2PMSG_34_BASE_IDX … #define regMP1_SMN_C2PMSG_35 … #define regMP1_SMN_C2PMSG_35_BASE_IDX … #define regMP1_SMN_C2PMSG_36 … #define regMP1_SMN_C2PMSG_36_BASE_IDX … #define regMP1_SMN_C2PMSG_37 … #define regMP1_SMN_C2PMSG_37_BASE_IDX … #define regMP1_SMN_C2PMSG_38 … #define regMP1_SMN_C2PMSG_38_BASE_IDX … #define regMP1_SMN_C2PMSG_39 … #define regMP1_SMN_C2PMSG_39_BASE_IDX … #define regMP1_SMN_C2PMSG_40 … #define regMP1_SMN_C2PMSG_40_BASE_IDX … #define regMP1_SMN_C2PMSG_41 … #define regMP1_SMN_C2PMSG_41_BASE_IDX … #define regMP1_SMN_C2PMSG_42 … #define regMP1_SMN_C2PMSG_42_BASE_IDX … #define regMP1_SMN_C2PMSG_43 … #define regMP1_SMN_C2PMSG_43_BASE_IDX … #define regMP1_SMN_C2PMSG_44 … #define regMP1_SMN_C2PMSG_44_BASE_IDX … #define regMP1_SMN_C2PMSG_45 … #define regMP1_SMN_C2PMSG_45_BASE_IDX … #define regMP1_SMN_C2PMSG_46 … #define regMP1_SMN_C2PMSG_46_BASE_IDX … #define regMP1_SMN_C2PMSG_47 … #define regMP1_SMN_C2PMSG_47_BASE_IDX … #define regMP1_SMN_C2PMSG_48 … #define regMP1_SMN_C2PMSG_48_BASE_IDX … #define regMP1_SMN_C2PMSG_49 … #define regMP1_SMN_C2PMSG_49_BASE_IDX … #define regMP1_SMN_C2PMSG_50 … #define regMP1_SMN_C2PMSG_50_BASE_IDX … #define regMP1_SMN_C2PMSG_51 … #define regMP1_SMN_C2PMSG_51_BASE_IDX … #define regMP1_SMN_C2PMSG_52 … #define regMP1_SMN_C2PMSG_52_BASE_IDX … #define regMP1_SMN_C2PMSG_53 … #define regMP1_SMN_C2PMSG_53_BASE_IDX … #define regMP1_SMN_C2PMSG_54 … #define regMP1_SMN_C2PMSG_54_BASE_IDX … #define regMP1_SMN_C2PMSG_55 … #define regMP1_SMN_C2PMSG_55_BASE_IDX … #define regMP1_SMN_C2PMSG_56 … #define regMP1_SMN_C2PMSG_56_BASE_IDX … #define regMP1_SMN_C2PMSG_57 … #define regMP1_SMN_C2PMSG_57_BASE_IDX … #define regMP1_SMN_C2PMSG_58 … #define regMP1_SMN_C2PMSG_58_BASE_IDX … #define regMP1_SMN_C2PMSG_59 … #define regMP1_SMN_C2PMSG_59_BASE_IDX … #define regMP1_SMN_C2PMSG_60 … #define regMP1_SMN_C2PMSG_60_BASE_IDX … #define regMP1_SMN_C2PMSG_61 … #define regMP1_SMN_C2PMSG_61_BASE_IDX … #define regMP1_SMN_C2PMSG_62 … #define regMP1_SMN_C2PMSG_62_BASE_IDX … #define regMP1_SMN_C2PMSG_63 … #define regMP1_SMN_C2PMSG_63_BASE_IDX … #define regMP1_SMN_C2PMSG_64 … #define regMP1_SMN_C2PMSG_64_BASE_IDX … #define regMP1_SMN_C2PMSG_65 … #define regMP1_SMN_C2PMSG_65_BASE_IDX … #define regMP1_SMN_C2PMSG_66 … #define regMP1_SMN_C2PMSG_66_BASE_IDX … #define regMP1_SMN_C2PMSG_67 … #define regMP1_SMN_C2PMSG_67_BASE_IDX … #define regMP1_SMN_C2PMSG_68 … #define regMP1_SMN_C2PMSG_68_BASE_IDX … #define regMP1_SMN_C2PMSG_69 … #define regMP1_SMN_C2PMSG_69_BASE_IDX … #define regMP1_SMN_C2PMSG_70 … #define regMP1_SMN_C2PMSG_70_BASE_IDX … #define regMP1_SMN_C2PMSG_71 … #define regMP1_SMN_C2PMSG_71_BASE_IDX … #define regMP1_SMN_C2PMSG_72 … #define regMP1_SMN_C2PMSG_72_BASE_IDX … #define regMP1_SMN_C2PMSG_73 … #define regMP1_SMN_C2PMSG_73_BASE_IDX … #define regMP1_SMN_C2PMSG_74 … #define regMP1_SMN_C2PMSG_74_BASE_IDX … #define regMP1_SMN_C2PMSG_75 … #define regMP1_SMN_C2PMSG_75_BASE_IDX … #define regMP1_SMN_C2PMSG_76 … #define regMP1_SMN_C2PMSG_76_BASE_IDX … #define regMP1_SMN_C2PMSG_77 … #define regMP1_SMN_C2PMSG_77_BASE_IDX … #define regMP1_SMN_C2PMSG_78 … #define regMP1_SMN_C2PMSG_78_BASE_IDX … #define regMP1_SMN_C2PMSG_79 … #define regMP1_SMN_C2PMSG_79_BASE_IDX … #define regMP1_SMN_C2PMSG_80 … #define regMP1_SMN_C2PMSG_80_BASE_IDX … #define regMP1_SMN_C2PMSG_81 … #define regMP1_SMN_C2PMSG_81_BASE_IDX … #define regMP1_SMN_C2PMSG_82 … #define regMP1_SMN_C2PMSG_82_BASE_IDX … #define regMP1_SMN_C2PMSG_83 … #define regMP1_SMN_C2PMSG_83_BASE_IDX … #define regMP1_SMN_C2PMSG_84 … #define regMP1_SMN_C2PMSG_84_BASE_IDX … #define regMP1_SMN_C2PMSG_85 … #define regMP1_SMN_C2PMSG_85_BASE_IDX … #define regMP1_SMN_C2PMSG_86 … #define regMP1_SMN_C2PMSG_86_BASE_IDX … #define regMP1_SMN_C2PMSG_87 … #define regMP1_SMN_C2PMSG_87_BASE_IDX … #define regMP1_SMN_C2PMSG_88 … #define regMP1_SMN_C2PMSG_88_BASE_IDX … #define regMP1_SMN_C2PMSG_89 … #define regMP1_SMN_C2PMSG_89_BASE_IDX … #define regMP1_SMN_C2PMSG_90 … #define regMP1_SMN_C2PMSG_90_BASE_IDX … #define regMP1_SMN_C2PMSG_91 … #define regMP1_SMN_C2PMSG_91_BASE_IDX … #define regMP1_SMN_C2PMSG_92 … #define regMP1_SMN_C2PMSG_92_BASE_IDX … #define regMP1_SMN_C2PMSG_93 … #define regMP1_SMN_C2PMSG_93_BASE_IDX … #define regMP1_SMN_C2PMSG_94 … #define regMP1_SMN_C2PMSG_94_BASE_IDX … #define regMP1_SMN_C2PMSG_95 … #define regMP1_SMN_C2PMSG_95_BASE_IDX … #define regMP1_SMN_C2PMSG_96 … #define regMP1_SMN_C2PMSG_96_BASE_IDX … #define regMP1_SMN_C2PMSG_97 … #define regMP1_SMN_C2PMSG_97_BASE_IDX … #define regMP1_SMN_C2PMSG_98 … #define regMP1_SMN_C2PMSG_98_BASE_IDX … #define regMP1_SMN_C2PMSG_99 … #define regMP1_SMN_C2PMSG_99_BASE_IDX … #define regMP1_SMN_C2PMSG_100 … #define regMP1_SMN_C2PMSG_100_BASE_IDX … #define regMP1_SMN_C2PMSG_101 … #define regMP1_SMN_C2PMSG_101_BASE_IDX … #define regMP1_SMN_C2PMSG_102 … #define regMP1_SMN_C2PMSG_102_BASE_IDX … #define regMP1_SMN_C2PMSG_103 … #define regMP1_SMN_C2PMSG_103_BASE_IDX … #define regMP1_SMN_C2PMSG_104 … #define regMP1_SMN_C2PMSG_104_BASE_IDX … #define regMP1_SMN_C2PMSG_105 … #define regMP1_SMN_C2PMSG_105_BASE_IDX … #define regMP1_SMN_C2PMSG_106 … #define regMP1_SMN_C2PMSG_106_BASE_IDX … #define regMP1_SMN_C2PMSG_107 … #define regMP1_SMN_C2PMSG_107_BASE_IDX … #define regMP1_SMN_C2PMSG_108 … #define regMP1_SMN_C2PMSG_108_BASE_IDX … #define regMP1_SMN_C2PMSG_109 … #define regMP1_SMN_C2PMSG_109_BASE_IDX … #define regMP1_SMN_C2PMSG_110 … #define regMP1_SMN_C2PMSG_110_BASE_IDX … #define regMP1_SMN_C2PMSG_111 … #define regMP1_SMN_C2PMSG_111_BASE_IDX … #define regMP1_SMN_C2PMSG_112 … #define regMP1_SMN_C2PMSG_112_BASE_IDX … #define regMP1_SMN_C2PMSG_113 … #define regMP1_SMN_C2PMSG_113_BASE_IDX … #define regMP1_SMN_C2PMSG_114 … #define regMP1_SMN_C2PMSG_114_BASE_IDX … #define regMP1_SMN_C2PMSG_115 … #define regMP1_SMN_C2PMSG_115_BASE_IDX … #define regMP1_SMN_C2PMSG_116 … #define regMP1_SMN_C2PMSG_116_BASE_IDX … #define regMP1_SMN_C2PMSG_117 … #define regMP1_SMN_C2PMSG_117_BASE_IDX … #define regMP1_SMN_C2PMSG_118 … #define regMP1_SMN_C2PMSG_118_BASE_IDX … #define regMP1_SMN_C2PMSG_119 … #define regMP1_SMN_C2PMSG_119_BASE_IDX … #define regMP1_SMN_C2PMSG_120 … #define regMP1_SMN_C2PMSG_120_BASE_IDX … #define regMP1_SMN_C2PMSG_121 … #define regMP1_SMN_C2PMSG_121_BASE_IDX … #define regMP1_SMN_C2PMSG_122 … #define regMP1_SMN_C2PMSG_122_BASE_IDX … #define regMP1_SMN_C2PMSG_123 … #define regMP1_SMN_C2PMSG_123_BASE_IDX … #define regMP1_SMN_C2PMSG_124 … #define regMP1_SMN_C2PMSG_124_BASE_IDX … #define regMP1_SMN_C2PMSG_125 … #define regMP1_SMN_C2PMSG_125_BASE_IDX … #define regMP1_SMN_C2PMSG_126 … #define regMP1_SMN_C2PMSG_126_BASE_IDX … #define regMP1_SMN_C2PMSG_127 … #define regMP1_SMN_C2PMSG_127_BASE_IDX … #define regMP1_SMN_IH_CREDIT … #define regMP1_SMN_IH_CREDIT_BASE_IDX … #define regMP1_SMN_IH_SW_INT … #define regMP1_SMN_IH_SW_INT_BASE_IDX … #define regMP1_SMN_IH_SW_INT_CTRL … #define regMP1_SMN_IH_SW_INT_CTRL_BASE_IDX … #define regMP1_SMN_FPS_CNT … #define regMP1_SMN_FPS_CNT_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH0 … #define regMP1_SMN_EXT_SCRATCH0_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH1 … #define regMP1_SMN_EXT_SCRATCH1_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH2 … #define regMP1_SMN_EXT_SCRATCH2_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH3 … #define regMP1_SMN_EXT_SCRATCH3_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH4 … #define regMP1_SMN_EXT_SCRATCH4_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH5 … #define regMP1_SMN_EXT_SCRATCH5_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH6 … #define regMP1_SMN_EXT_SCRATCH6_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH7 … #define regMP1_SMN_EXT_SCRATCH7_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH8 … #define regMP1_SMN_EXT_SCRATCH8_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH10 … #define regMP1_SMN_EXT_SCRATCH10_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH11 … #define regMP1_SMN_EXT_SCRATCH11_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH12 … #define regMP1_SMN_EXT_SCRATCH12_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH13 … #define regMP1_SMN_EXT_SCRATCH13_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH14 … #define regMP1_SMN_EXT_SCRATCH14_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH15 … #define regMP1_SMN_EXT_SCRATCH15_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH16 … #define regMP1_SMN_EXT_SCRATCH16_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH17 … #define regMP1_SMN_EXT_SCRATCH17_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH18 … #define regMP1_SMN_EXT_SCRATCH18_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH19 … #define regMP1_SMN_EXT_SCRATCH19_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH20 … #define regMP1_SMN_EXT_SCRATCH20_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH21 … #define regMP1_SMN_EXT_SCRATCH21_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH22 … #define regMP1_SMN_EXT_SCRATCH22_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH23 … #define regMP1_SMN_EXT_SCRATCH23_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH24 … #define regMP1_SMN_EXT_SCRATCH24_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH25 … #define regMP1_SMN_EXT_SCRATCH25_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH26 … #define regMP1_SMN_EXT_SCRATCH26_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH27 … #define regMP1_SMN_EXT_SCRATCH27_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH28 … #define regMP1_SMN_EXT_SCRATCH28_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH29 … #define regMP1_SMN_EXT_SCRATCH29_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH30 … #define regMP1_SMN_EXT_SCRATCH30_BASE_IDX … #define regMP1_SMN_EXT_SCRATCH31 … #define regMP1_SMN_EXT_SCRATCH31_BASE_IDX … // addressBlock: mp_SmuMp1Pub_CruDec // base address: 0x0 #define regMP1_FIRMWARE_FLAGS … #define regMP1_FIRMWARE_FLAGS_BASE_IDX … #endif
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