/* * Copyright 2017 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * */ #include "pp_debug.h" #include "smumgr.h" #include "smu_ucode_xfer_vi.h" #include "vegam_smumgr.h" #include "smu/smu_7_1_3_d.h" #include "smu/smu_7_1_3_sh_mask.h" #include "gmc/gmc_8_1_d.h" #include "gmc/gmc_8_1_sh_mask.h" #include "oss/oss_3_0_d.h" #include "gca/gfx_8_0_d.h" #include "bif/bif_5_0_d.h" #include "bif/bif_5_0_sh_mask.h" #include "ppatomctrl.h" #include "cgs_common.h" #include "smu7_ppsmc.h" #include "smu7_dyn_defaults.h" #include "smu7_hwmgr.h" #include "hardwaremanager.h" #include "atombios.h" #include "pppcielanes.h" #include "dce/dce_11_2_d.h" #include "dce/dce_11_2_sh_mask.h" #define PPVEGAM_TARGETACTIVITY_DFLT … #define VOLTAGE_VID_OFFSET_SCALE1 … #define VOLTAGE_VID_OFFSET_SCALE2 … #define POWERTUNE_DEFAULT_SET_MAX … #define VDDC_VDDCI_DELTA … #define MC_CG_ARB_FREQ_F1 … #define STRAP_ASIC_RO_LSB … #define STRAP_ASIC_RO_MSB … #define PPSMC_MSG_ApplyAvfsCksOffVoltage … #define PPSMC_MSG_EnableModeSwitchRLCNotification … static const struct vegam_pt_defaults vegam_power_tune_data_set_array[POWERTUNE_DEFAULT_SET_MAX] = …; static const sclkFcwRange_t Range_Table[NUM_SCLK_RANGE] = …; static int vegam_smu_init(struct pp_hwmgr *hwmgr) { … } static int vegam_start_smu_in_protection_mode(struct pp_hwmgr *hwmgr) { … } static int vegam_start_smu_in_non_protection_mode(struct pp_hwmgr *hwmgr) { … } static int vegam_start_smu(struct pp_hwmgr *hwmgr) { … } static int vegam_process_firmware_header(struct pp_hwmgr *hwmgr) { … } static bool vegam_is_dpm_running(struct pp_hwmgr *hwmgr) { … } static uint32_t vegam_get_mac_definition(uint32_t value) { … } static int vegam_update_uvd_smc_table(struct pp_hwmgr *hwmgr) { … } static int vegam_update_vce_smc_table(struct pp_hwmgr *hwmgr) { … } static int vegam_update_bif_smc_table(struct pp_hwmgr *hwmgr) { … } static int vegam_update_smc_table(struct pp_hwmgr *hwmgr, uint32_t type) { … } static void vegam_initialize_power_tune_defaults(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr, SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_vddci_table(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_cac_table(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_voltage_tables(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_ulv_level(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_Ulv *state) { … } static int vegam_populate_ulv_state(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_link_level(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_get_dependency_volt_by_clk(struct pp_hwmgr *hwmgr, struct phm_ppt_v1_clock_voltage_dependency_table *dep_table, uint32_t clock, SMU_VoltageLevel *voltage, uint32_t *mvdd) { … } static void vegam_get_sclk_range_table(struct pp_hwmgr *hwmgr, SMU75_Discrete_DpmTable *table) { … } static int vegam_calculate_sclk_params(struct pp_hwmgr *hwmgr, uint32_t clock, SMU_SclkSetting *sclk_setting) { … } static uint8_t vegam_get_sleep_divider_id_from_clock(uint32_t clock, uint32_t clock_insr) { … } static int vegam_populate_single_graphic_level(struct pp_hwmgr *hwmgr, uint32_t clock, struct SMU75_Discrete_GraphicsLevel *level) { … } static int vegam_populate_all_graphic_levels(struct pp_hwmgr *hwmgr) { … } static int vegam_calculate_mclk_params(struct pp_hwmgr *hwmgr, uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) { … } static int vegam_populate_single_memory_level(struct pp_hwmgr *hwmgr, uint32_t clock, struct SMU75_Discrete_MemoryLevel *mem_level) { … } static int vegam_populate_all_memory_levels(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_mvdd_value(struct pp_hwmgr *hwmgr, uint32_t mclk, SMIO_Pattern *smio_pat) { … } static int vegam_populate_smc_acpi_level(struct pp_hwmgr *hwmgr, SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_vce_level(struct pp_hwmgr *hwmgr, SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_memory_timing_parameters(struct pp_hwmgr *hwmgr, int32_t eng_clock, int32_t mem_clock, SMU75_Discrete_MCArbDramTimingTableEntry *arb_regs) { … } static int vegam_program_memory_timing_parameters(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_smc_uvd_level(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_boot_level(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_smc_initial_state(struct pp_hwmgr *hwmgr) { … } static uint16_t scale_fan_gain_settings(uint16_t raw_setting) { … } static int vegam_populate_bapm_parameters_in_dpm_table(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr) { … } static bool vegam_is_hw_avfs_present(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_avfs_parameters(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_vr_config(struct pp_hwmgr *hwmgr, struct SMU75_Discrete_DpmTable *table) { … } static int vegam_populate_svi_load_line(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_tdc_limit(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_dw8(struct pp_hwmgr *hwmgr, uint32_t fuse_table_offset) { … } static int vegam_populate_temperature_scaler(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_fuzzy_fan(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_gnb_lpml(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_bapm_vddc_base_leakage_sidd(struct pp_hwmgr *hwmgr) { … } static int vegam_populate_pm_fuses(struct pp_hwmgr *hwmgr) { … } static int vegam_enable_reconfig_cus(struct pp_hwmgr *hwmgr) { … } static int vegam_init_smc_table(struct pp_hwmgr *hwmgr) { … } static uint32_t vegam_get_offsetof(uint32_t type, uint32_t member) { … } static int vegam_program_mem_timing_parameters(struct pp_hwmgr *hwmgr) { … } static int vegam_update_sclk_threshold(struct pp_hwmgr *hwmgr) { … } static int vegam_thermal_avfs_enable(struct pp_hwmgr *hwmgr) { … } static int vegam_thermal_setup_fan_table(struct pp_hwmgr *hwmgr) { … } const struct pp_smumgr_func vegam_smu_funcs = …;
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