#include "reg_helper.h"
#include "core_types.h"
#include "link_encoder.h"
#include "dce_link_encoder.h"
#include "stream_encoder.h"
#include "dc_bios_types.h"
#include "gpio_service_interface.h"
#include "dce/dce_11_0_d.h"
#include "dce/dce_11_0_sh_mask.h"
#include "dce/dce_11_0_enum.h"
#ifndef DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT
#define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE__SHIFT …
#endif
#ifndef DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE_MASK
#define DMU_MEM_PWR_CNTL__DMCU_IRAM_MEM_PWR_STATE_MASK …
#endif
#ifndef HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK
#define HPD0_DC_HPD_CONTROL__DC_HPD_EN_MASK …
#endif
#ifndef HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT
#define HPD0_DC_HPD_CONTROL__DC_HPD_EN__SHIFT …
#endif
#define CTX …
#define DC_LOGGER …
#define REG(reg) …
#define AUX_REG(reg) …
#define HPD_REG(reg) …
#define DEFAULT_AUX_MAX_DATA_SIZE …
#define AUX_MAX_DEFER_WRITE_RETRY …
#define DCE110_DIG_FE_SOURCE_SELECT_INVALID …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGA …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGB …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGC …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGD …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGE …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGF …
#define DCE110_DIG_FE_SOURCE_SELECT_DIGG …
enum { … };
#define DIG_REG(reg) …
#define DP_REG(reg) …
static const struct link_encoder_funcs dce110_lnk_enc_funcs = …;
static enum bp_result link_transmitter_control(
struct dce110_link_encoder *enc110,
struct bp_transmitter_control *cntl)
{ … }
static void enable_phy_bypass_mode(
struct dce110_link_encoder *enc110,
bool enable)
{ … }
static void disable_prbs_symbols(
struct dce110_link_encoder *enc110,
bool disable)
{ … }
static void disable_prbs_mode(
struct dce110_link_encoder *enc110)
{ … }
static void program_pattern_symbols(
struct dce110_link_encoder *enc110,
uint16_t pattern_symbols[8])
{ … }
static void set_dp_phy_pattern_d102(
struct dce110_link_encoder *enc110)
{ … }
static void set_link_training_complete(
struct dce110_link_encoder *enc110,
bool complete)
{ … }
unsigned int dce110_get_dig_frontend(struct link_encoder *enc)
{ … }
void dce110_link_encoder_set_dp_phy_pattern_training_pattern(
struct link_encoder *enc,
uint32_t index)
{ … }
static void setup_panel_mode(
struct dce110_link_encoder *enc110,
enum dp_panel_mode panel_mode)
{ … }
static void set_dp_phy_pattern_symbol_error(
struct dce110_link_encoder *enc110)
{ … }
static void set_dp_phy_pattern_prbs7(
struct dce110_link_encoder *enc110)
{ … }
static void set_dp_phy_pattern_80bit_custom(
struct dce110_link_encoder *enc110,
const uint8_t *pattern)
{ … }
static void set_dp_phy_pattern_hbr2_compliance_cp2520_2(
struct dce110_link_encoder *enc110,
unsigned int cp2520_pattern)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_set_dp_phy_pattern_hbr2_compliance_cp2520_2(
struct dce110_link_encoder *enc110,
unsigned int cp2520_pattern)
{ … }
#endif
static void set_dp_phy_pattern_passthrough_mode(
struct dce110_link_encoder *enc110,
enum dp_panel_mode panel_mode)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_set_dp_phy_pattern_passthrough_mode(
struct dce110_link_encoder *enc110,
enum dp_panel_mode panel_mode)
{ … }
#endif
static uint8_t get_frontend_source(
enum engine_id engine)
{ … }
static void configure_encoder(
struct dce110_link_encoder *enc110,
const struct dc_link_settings *link_settings)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_configure_encoder(
struct dce110_link_encoder *enc110,
const struct dc_link_settings *link_settings)
{ … }
#endif
static void aux_initialize(
struct dce110_link_encoder *enc110)
{ … }
void dce110_psr_program_dp_dphy_fast_training(struct link_encoder *enc,
bool exit_link_training_required)
{ … }
void dce110_psr_program_secondary_packet(struct link_encoder *enc,
unsigned int sdp_transmit_line_num_deadline)
{ … }
bool dce110_is_dig_enabled(struct link_encoder *enc)
{ … }
static void link_encoder_disable(struct dce110_link_encoder *enc110)
{ … }
static void hpd_initialize(
struct dce110_link_encoder *enc110)
{ … }
bool dce110_link_encoder_validate_dvi_output(
const struct dce110_link_encoder *enc110,
enum signal_type connector_signal,
enum signal_type signal,
const struct dc_crtc_timing *crtc_timing)
{ … }
static bool dce110_link_encoder_validate_hdmi_output(
const struct dce110_link_encoder *enc110,
const struct dc_crtc_timing *crtc_timing,
int adjusted_pix_clk_khz)
{ … }
bool dce110_link_encoder_validate_dp_output(
const struct dce110_link_encoder *enc110,
const struct dc_crtc_timing *crtc_timing)
{ … }
void dce110_link_encoder_construct(
struct dce110_link_encoder *enc110,
const struct encoder_init_data *init_data,
const struct encoder_feature_support *enc_features,
const struct dce110_link_enc_registers *link_regs,
const struct dce110_link_enc_aux_registers *aux_regs,
const struct dce110_link_enc_hpd_registers *hpd_regs)
{ … }
bool dce110_link_encoder_validate_output_with_stream(
struct link_encoder *enc,
const struct dc_stream_state *stream)
{ … }
void dce110_link_encoder_hw_init(
struct link_encoder *enc)
{ … }
void dce110_link_encoder_destroy(struct link_encoder **enc)
{ … }
void dce110_link_encoder_setup(
struct link_encoder *enc,
enum signal_type signal)
{ … }
void dce110_link_encoder_enable_tmds_output(
struct link_encoder *enc,
enum clock_source_id clock_source,
enum dc_color_depth color_depth,
enum signal_type signal,
uint32_t pixel_clock)
{ … }
void dce110_link_encoder_enable_lvds_output(
struct link_encoder *enc,
enum clock_source_id clock_source,
uint32_t pixel_clock)
{ … }
void dce110_link_encoder_enable_dp_output(
struct link_encoder *enc,
const struct dc_link_settings *link_settings,
enum clock_source_id clock_source)
{ … }
void dce110_link_encoder_enable_dp_mst_output(
struct link_encoder *enc,
const struct dc_link_settings *link_settings,
enum clock_source_id clock_source)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_link_encoder_enable_dp_output(
struct link_encoder *enc,
const struct dc_link_settings *link_settings,
enum clock_source_id clock_source)
{ … }
static void dce60_link_encoder_enable_dp_mst_output(
struct link_encoder *enc,
const struct dc_link_settings *link_settings,
enum clock_source_id clock_source)
{ … }
#endif
void dce110_link_encoder_disable_output(
struct link_encoder *enc,
enum signal_type signal)
{ … }
void dce110_link_encoder_dp_set_lane_settings(
struct link_encoder *enc,
const struct dc_link_settings *link_settings,
const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX])
{ … }
void dce110_link_encoder_dp_set_phy_pattern(
struct link_encoder *enc,
const struct encoder_set_dp_phy_pattern_param *param)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_link_encoder_dp_set_phy_pattern(
struct link_encoder *enc,
const struct encoder_set_dp_phy_pattern_param *param)
{ … }
#endif
static void fill_stream_allocation_row_info(
const struct link_mst_stream_allocation *stream_allocation,
uint32_t *src,
uint32_t *slots)
{ … }
void dce110_link_encoder_update_mst_stream_allocation_table(
struct link_encoder *enc,
const struct link_mst_stream_allocation_table *table)
{ … }
void dce110_link_encoder_connect_dig_be_to_fe(
struct link_encoder *enc,
enum engine_id engine,
bool connect)
{ … }
void dce110_link_encoder_enable_hpd(struct link_encoder *enc)
{ … }
void dce110_link_encoder_disable_hpd(struct link_encoder *enc)
{ … }
void dce110_link_encoder_get_max_link_cap(struct link_encoder *enc,
struct dc_link_settings *link_settings)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static const struct link_encoder_funcs dce60_lnk_enc_funcs = …;
void dce60_link_encoder_construct(
struct dce110_link_encoder *enc110,
const struct encoder_init_data *init_data,
const struct encoder_feature_support *enc_features,
const struct dce110_link_enc_registers *link_regs,
const struct dce110_link_enc_aux_registers *aux_regs,
const struct dce110_link_enc_hpd_registers *hpd_regs)
{ … }
#endif