/* * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include "reg_helper.h" #include "dce_audio.h" #include "dce/dce_11_0_d.h" #include "dce/dce_11_0_sh_mask.h" #define DCE_AUD(audio) … #define CTX … #define DC_LOGGER_INIT() … #define REG(reg) … #undef FN #define FN(reg_name, field_name) … #define IX_REG(reg) … #define AZ_REG_READ(reg_name) … #define AZ_REG_WRITE(reg_name, value) … static void write_indirect_azalia_reg(struct audio *audio, uint32_t reg_index, uint32_t reg_data) { … } static uint32_t read_indirect_azalia_reg(struct audio *audio, uint32_t reg_index) { … } static bool is_audio_format_supported( const struct audio_info *audio_info, enum audio_format_code audio_format_code, uint32_t *format_index) { … } /*For HDMI, calculate if specified sample rates can fit into a given timing */ static void check_audio_bandwidth_hdmi( const struct audio_crtc_info *crtc_info, uint32_t channel_count, union audio_sample_rates *sample_rates) { … } static struct fixed31_32 get_link_symbol_clk_freq_mhz(enum dc_link_rate link_rate) { … } struct dp_audio_layout_config { … }; static void get_audio_layout_config( uint32_t channel_count, enum dp_link_encoding encoding, struct dp_audio_layout_config *output) { … } static uint32_t get_av_stream_map_lane_count( enum dp_link_encoding encoding, enum dc_lane_count lane_count, bool is_mst) { … } static uint32_t get_audio_sdp_overhead( enum dp_link_encoding encoding, enum dc_lane_count lane_count, bool is_mst) { … } static uint32_t calculate_required_audio_bw_in_symbols( const struct audio_crtc_info *crtc_info, const struct dp_audio_layout_config *layout_config, uint32_t channel_count, uint32_t sample_rate_hz, uint32_t av_stream_map_lane_count, uint32_t audio_sdp_overhead) { … } /* Current calculation only applicable for 8b/10b MST and 128b/132b SST/MST. */ static uint32_t calculate_available_hblank_bw_in_symbols( const struct audio_crtc_info *crtc_info, const struct audio_dp_link_info *dp_link_info) { … } static void check_audio_bandwidth_dp( const struct audio_crtc_info *crtc_info, const struct audio_dp_link_info *dp_link_info, uint32_t channel_count, union audio_sample_rates *sample_rates) { … } static void check_audio_bandwidth( const struct audio_crtc_info *crtc_info, const struct audio_dp_link_info *dp_link_info, uint32_t channel_count, enum signal_type signal, union audio_sample_rates *sample_rates) { … } /* expose/not expose HBR capability to Audio driver */ static void set_high_bit_rate_capable( struct audio *audio, bool capable) { … } /* set video latency in ms/2+1 */ static void set_video_latency( struct audio *audio, int latency_in_ms) { … } /* set audio latency in ms/2+1 */ static void set_audio_latency( struct audio *audio, int latency_in_ms) { … } void dce_aud_az_enable(struct audio *audio) { … } void dce_aud_az_disable(struct audio *audio) { … } void dce_aud_az_configure( struct audio *audio, enum signal_type signal, const struct audio_crtc_info *crtc_info, const struct audio_info *audio_info, const struct audio_dp_link_info *dp_link_info) { … } /* * todo: wall clk related functionality probably belong to clock_src. */ /* search pixel clock value for Azalia HDMI Audio */ static void get_azalia_clock_info_hdmi( uint32_t crtc_pixel_clock_100hz, uint32_t actual_pixel_clock_100Hz, struct azalia_clock_info *azalia_clock_info) { … } static void get_azalia_clock_info_dp( uint32_t requested_pixel_clock_100Hz, const struct audio_pll_info *pll_info, struct azalia_clock_info *azalia_clock_info) { … } void dce_aud_wall_dto_setup( struct audio *audio, enum signal_type signal, const struct audio_crtc_info *crtc_info, const struct audio_pll_info *pll_info) { … } #if defined(CONFIG_DRM_AMD_DC_SI) static void dce60_aud_wall_dto_setup( struct audio *audio, enum signal_type signal, const struct audio_crtc_info *crtc_info, const struct audio_pll_info *pll_info) { … } #endif static bool dce_aud_endpoint_valid(struct audio *audio) { … } /* initialize HW state */ void dce_aud_hw_init( struct audio *audio) { … } static const struct audio_funcs funcs = …; #if defined(CONFIG_DRM_AMD_DC_SI) static const struct audio_funcs dce60_funcs = …; #endif void dce_aud_destroy(struct audio **audio) { … } struct audio *dce_audio_create( struct dc_context *ctx, unsigned int inst, const struct dce_audio_registers *reg, const struct dce_audio_shift *shifts, const struct dce_audio_mask *masks ) { … } #if defined(CONFIG_DRM_AMD_DC_SI) struct audio *dce60_audio_create( struct dc_context *ctx, unsigned int inst, const struct dce_audio_registers *reg, const struct dce_audio_shift *shifts, const struct dce_audio_mask *masks ) { … } #endif
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