dce_clock_source.h | Explore in Territory

/* Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DC_CLOCK_SOURCE_DCE_H__
#define __DC_CLOCK_SOURCE_DCE_H__

#include "../inc/clock_source.h"

#define TO_DCE110_CLK_SRC(clk_src) …

#define CS_COMMON_REG_LIST_DCE_100_110(id) …

#define CS_COMMON_REG_LIST_DCE_80(id) …

#define CS_COMMON_REG_LIST_DCE_112(id) …


#define CS_SF(reg_name, field_name, post_fix) …

#define CS_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh) …

#define CS_COMMON_MASK_SH_LIST_DCE_112(mask_sh) …

#define CS_COMMON_REG_LIST_DCN2_0(index, pllid) …

#define CS_COMMON_REG_LIST_DCN201(index, pllid) …

#define CS_COMMON_REG_LIST_DCN2_1(index, pllid) …

#define CS_COMMON_REG_LIST_DCN3_0(index, pllid) …

#define CS_COMMON_REG_LIST_DCN3_01(index, pllid) …

#define CS_COMMON_REG_LIST_DCN3_02(index, pllid) …

#define CS_COMMON_REG_LIST_DCN3_03(index, pllid) …

#define CS_COMMON_MASK_SH_LIST_DCN2_0(mask_sh) …

#define CS_COMMON_MASK_SH_LIST_DCN3_1_4(mask_sh) …

#define CS_COMMON_MASK_SH_LIST_DCN3_2(mask_sh) …

#define CS_COMMON_REG_LIST_DCN1_0(index, pllid) …

#define CS_COMMON_MASK_SH_LIST_DCN1_0(mask_sh) …


#define CS_REG_FIELD_LIST(type) …

#define CS_REG_FIELD_LIST_DCN32(type) …

struct dce110_clk_src_shift { … };

struct dce110_clk_src_mask{ … };

struct dce110_clk_src_regs { … };

struct dce110_clk_src { … };

bool dce110_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dce112_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dcn20_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dcn3_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dcn301_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dcn31_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);

bool dcn401_clk_src_construct(
	struct dce110_clk_src *clk_src,
	struct dc_context *ctx,
	struct dc_bios *bios,
	enum clock_source_id id,
	const struct dce110_clk_src_regs *regs,
	const struct dce110_clk_src_shift *cs_shift,
	const struct dce110_clk_src_mask *cs_mask);
/* this table is use to find *1.001 and /1.001 pixel rates from non-precise pixel rate */
struct pixel_rate_range_table_entry { … };

extern const struct pixel_rate_range_table_entry video_optimized_pixel_rates[];
const struct pixel_rate_range_table_entry *look_up_in_video_optimized_rate_tlb(
		unsigned int pixel_rate_khz);

#endif
linux/drivers/gpu/drm/amd/display/dc/dce/dce_clock_source.h
