#include "dce_mem_input.h"
#include "reg_helper.h"
#include "basics/conversion.h"
#define CTX …
#define REG(reg) …
#undef FN
#define FN(reg_name, field_name) …
struct pte_setting { … };
enum mi_bits_per_pixel { … };
enum mi_tiling_format { … };
static const struct pte_setting pte_settings[mi_tiling_count][mi_bpp_count] = …;
static enum mi_bits_per_pixel get_mi_bpp(
enum surface_pixel_format format)
{ … }
static enum mi_tiling_format get_mi_tiling(
union dc_tiling_info *tiling_info)
{ … }
static bool is_vert_scan(enum dc_rotation_angle rotation)
{ … }
static void dce_mi_program_pte_vm(
struct mem_input *mi,
enum surface_pixel_format format,
union dc_tiling_info *tiling_info,
enum dc_rotation_angle rotation)
{ … }
static void program_urgency_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t urgency_low_wm,
uint32_t urgency_high_wm)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_program_urgency_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t urgency_low_wm,
uint32_t urgency_high_wm)
{ … }
#endif
static void dce120_program_urgency_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t urgency_low_wm,
uint32_t urgency_high_wm)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_program_nbp_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t nbp_wm)
{ … }
#endif
static void program_nbp_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t nbp_wm)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_program_stutter_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t stutter_mark)
{ … }
#endif
static void dce120_program_stutter_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t stutter_mark,
uint32_t stutter_entry)
{ … }
static void program_stutter_watermark(
struct dce_mem_input *dce_mi,
uint32_t wm_select,
uint32_t stutter_mark)
{ … }
static void dce_mi_program_display_marks(
struct mem_input *mi,
struct dce_watermarks nbp,
struct dce_watermarks stutter_exit,
struct dce_watermarks stutter_enter,
struct dce_watermarks urgent,
uint32_t total_dest_line_time_ns)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_mi_program_display_marks(
struct mem_input *mi,
struct dce_watermarks nbp,
struct dce_watermarks stutter_exit,
struct dce_watermarks stutter_enter,
struct dce_watermarks urgent,
uint32_t total_dest_line_time_ns)
{ … }
#endif
static void dce112_mi_program_display_marks(struct mem_input *mi,
struct dce_watermarks nbp,
struct dce_watermarks stutter_exit,
struct dce_watermarks stutter_entry,
struct dce_watermarks urgent,
uint32_t total_dest_line_time_ns)
{ … }
static void dce120_mi_program_display_marks(struct mem_input *mi,
struct dce_watermarks nbp,
struct dce_watermarks stutter_exit,
struct dce_watermarks stutter_entry,
struct dce_watermarks urgent,
uint32_t total_dest_line_time_ns)
{ … }
static void program_tiling(
struct dce_mem_input *dce_mi, const union dc_tiling_info *info)
{ … }
static void program_size_and_rotation(
struct dce_mem_input *dce_mi,
enum dc_rotation_angle rotation,
const struct plane_size *plane_size)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_program_size(
struct dce_mem_input *dce_mi,
enum dc_rotation_angle rotation,
const struct plane_size *plane_size)
{ … }
#endif
static void program_grph_pixel_format(
struct dce_mem_input *dce_mi,
enum surface_pixel_format format)
{ … }
static void dce_mi_program_surface_config(
struct mem_input *mi,
enum surface_pixel_format format,
union dc_tiling_info *tiling_info,
struct plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
bool horizontal_mirror)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
static void dce60_mi_program_surface_config(
struct mem_input *mi,
enum surface_pixel_format format,
union dc_tiling_info *tiling_info,
struct plane_size *plane_size,
enum dc_rotation_angle rotation,
struct dc_plane_dcc_param *dcc,
bool horizontal_mirror)
{ … }
#endif
static uint32_t get_dmif_switch_time_us(
uint32_t h_total,
uint32_t v_total,
uint32_t pix_clk_khz)
{ … }
static void dce_mi_allocate_dmif(
struct mem_input *mi,
uint32_t h_total,
uint32_t v_total,
uint32_t pix_clk_khz,
uint32_t total_stream_num)
{ … }
static void dce_mi_free_dmif(
struct mem_input *mi,
uint32_t total_stream_num)
{ … }
static void program_sec_addr(
struct dce_mem_input *dce_mi,
PHYSICAL_ADDRESS_LOC address)
{ … }
static void program_pri_addr(
struct dce_mem_input *dce_mi,
PHYSICAL_ADDRESS_LOC address)
{ … }
static bool dce_mi_is_flip_pending(struct mem_input *mem_input)
{ … }
static bool dce_mi_program_surface_flip_and_addr(
struct mem_input *mem_input,
const struct dc_plane_address *address,
bool flip_immediate)
{ … }
static const struct mem_input_funcs dce_mi_funcs = …;
#if defined(CONFIG_DRM_AMD_DC_SI)
static const struct mem_input_funcs dce60_mi_funcs = …;
#endif
static const struct mem_input_funcs dce112_mi_funcs = …;
static const struct mem_input_funcs dce120_mi_funcs = …;
void dce_mem_input_construct(
struct dce_mem_input *dce_mi,
struct dc_context *ctx,
int inst,
const struct dce_mem_input_registers *regs,
const struct dce_mem_input_shift *mi_shift,
const struct dce_mem_input_mask *mi_mask)
{ … }
#if defined(CONFIG_DRM_AMD_DC_SI)
void dce60_mem_input_construct(
struct dce_mem_input *dce_mi,
struct dc_context *ctx,
int inst,
const struct dce_mem_input_registers *regs,
const struct dce_mem_input_shift *mi_shift,
const struct dce_mem_input_mask *mi_mask)
{ … }
#endif
void dce112_mem_input_construct(
struct dce_mem_input *dce_mi,
struct dc_context *ctx,
int inst,
const struct dce_mem_input_registers *regs,
const struct dce_mem_input_shift *mi_shift,
const struct dce_mem_input_mask *mi_mask)
{ … }
void dce120_mem_input_construct(
struct dce_mem_input *dce_mi,
struct dc_context *ctx,
int inst,
const struct dce_mem_input_registers *regs,
const struct dce_mem_input_shift *mi_shift,
const struct dce_mem_input_mask *mi_mask)
{ … }