dce_opp.h | Explore in Territory

/* Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DC_OPP_DCE_H__
#define __DC_OPP_DCE_H__

#include "dc_types.h"
#include "opp.h"
#include "core_types.h"

#define FROM_DCE11_OPP(opp) …

enum dce110_opp_reg_type { … };

#define OPP_COMMON_REG_LIST_BASE(id) …

#define OPP_DCE_80_REG_LIST(id) …

#define OPP_DCE_100_REG_LIST(id) …

#define OPP_DCE_110_REG_LIST(id) …

#define OPP_DCE_112_REG_LIST(id) …

#define OPP_DCE_120_REG_LIST(id) …

#if defined(CONFIG_DRM_AMD_DC_SI)
#define OPP_DCE_60_REG_LIST(id) …
#endif

#define OPP_SF(reg_name, field_name, post_fix) …

#define OPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh) …

#define OPP_COMMON_MASK_SH_LIST_DCE_110(mask_sh) …

#define OPP_COMMON_MASK_SH_LIST_DCE_100(mask_sh) …

#define OPP_COMMON_MASK_SH_LIST_DCE_112(mask_sh) …

#define OPP_COMMON_MASK_SH_LIST_DCE_80(mask_sh) …

#define OPP_COMMON_MASK_SH_LIST_DCE_120(mask_sh) …

#if defined(CONFIG_DRM_AMD_DC_SI)
#define OPP_COMMON_MASK_SH_LIST_DCE_60(mask_sh) …
#endif

#define OPP_REG_FIELD_LIST(type) …\

struct dce_opp_shift { … };

struct dce_opp_mask { … };

struct dce_opp_registers { … };

/* OPP RELATED */
#define TO_DCE110_OPP(opp) …

struct dce110_opp { … };

void dce110_opp_construct(struct dce110_opp *opp110,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dce_opp_registers *regs,
	const struct dce_opp_shift *opp_shift,
	const struct dce_opp_mask *opp_mask);

#if defined(CONFIG_DRM_AMD_DC_SI)
void dce60_opp_construct(struct dce110_opp *opp110,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dce_opp_registers *regs,
	const struct dce_opp_shift *opp_shift,
	const struct dce_opp_mask *opp_mask);
#endif

void dce110_opp_destroy(struct output_pixel_processor **opp);



/* FORMATTER RELATED */
void dce110_opp_program_bit_depth_reduction(
	struct output_pixel_processor *opp,
	const struct bit_depth_reduction_params *params);

void dce110_opp_program_clamping_and_pixel_encoding(
	struct output_pixel_processor *opp,
	const struct clamping_and_pixel_encoding_params *params);

void dce110_opp_set_dyn_expansion(
	struct output_pixel_processor *opp,
	enum dc_color_space color_sp,
	enum dc_color_depth color_dpth,
	enum signal_type signal);

void dce110_opp_program_fmt(
	struct output_pixel_processor *opp,
	struct bit_depth_reduction_params *fmt_bit_depth,
	struct clamping_and_pixel_encoding_params *clamping);

void dce110_opp_set_clamping(
	struct dce110_opp *opp110,
	const struct clamping_and_pixel_encoding_params *params);

#endif
linux/drivers/gpu/drm/amd/display/dc/dce/dce_opp.h
