linux/drivers/gpu/drm/amd/display/dc/dce/dce_ipp.h

/*
 * Copyright 2017 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef _DCE_IPP_H_
#define _DCE_IPP_H_

#include "ipp.h"

#define TO_DCE_IPP(ipp)

#define IPP_COMMON_REG_LIST_DCE_BASE(id)

#define IPP_DCE100_REG_LIST_DCE_BASE(id)

#define IPP_DCE110_REG_LIST_DCE_BASE(id)

#define IPP_SF(reg_name, field_name, post_fix)

#define IPP_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh)

#define IPP_DCE100_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh)

#define IPP_DCE120_MASK_SH_LIST_SOC_BASE(mask_sh)

#if defined(CONFIG_DRM_AMD_DC_SI)
#define IPP_DCE60_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh)
#endif

#define IPP_REG_FIELD_LIST(type)

struct dce_ipp_shift {};

struct dce_ipp_mask {};

struct dce_ipp_registers {};

struct dce_ipp {};

void dce_ipp_construct(struct dce_ipp *ipp_dce,
	struct dc_context *ctx,
	int inst,
	const struct dce_ipp_registers *regs,
	const struct dce_ipp_shift *ipp_shift,
	const struct dce_ipp_mask *ipp_mask);

#if defined(CONFIG_DRM_AMD_DC_SI)
void dce60_ipp_construct(struct dce_ipp *ipp_dce,
	struct dc_context *ctx,
	int inst,
	const struct dce_ipp_registers *regs,
	const struct dce_ipp_shift *ipp_shift,
	const struct dce_ipp_mask *ipp_mask);
#endif

void dce_ipp_destroy(struct input_pixel_processor **ipp);

#endif /* _DCE_IPP_H_ */