/* * Copyright 2012-16 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #ifndef _DCE_DMCU_H_ #define _DCE_DMCU_H_ #include "dmcu.h" #define DMCU_COMMON_REG_LIST_DCE_BASE() … #if defined(CONFIG_DRM_AMD_DC_SI) #define DMCU_DCE60_REG_LIST() … #endif #define DMCU_DCE80_REG_LIST() … #define DMCU_DCE110_COMMON_REG_LIST() … #define DMCU_DCN10_REG_LIST() … #define DMCU_DCN20_REG_LIST() … #define DMCU_SF(reg_name, field_name, post_fix) … #define DMCU_COMMON_MASK_SH_LIST_DCE_COMMON_BASE(mask_sh) … #if defined(CONFIG_DRM_AMD_DC_SI) #define DMCU_MASK_SH_LIST_DCE60(mask_sh) … #endif #define DMCU_MASK_SH_LIST_DCE80(mask_sh) … #define DMCU_MASK_SH_LIST_DCE110(mask_sh) … #define DMCU_MASK_SH_LIST_DCN10(mask_sh) … #define DMCU_REG_FIELD_LIST(type) … struct dce_dmcu_shift { … }; struct dce_dmcu_mask { … }; struct dce_dmcu_registers { … }; struct dce_dmcu { … }; /******************************************************************* * MASTER_COMM_DATA_REG1 Bit position Data * 7:0 hyst_frames[7:0] * 14:8 hyst_lines[6:0] * 15 RFB_UPDATE_AUTO_EN * 18:16 phy_num[2:0] * 21:19 dcp_sel[2:0] * 22 phy_type * 23 frame_cap_ind * 26:24 aux_chan[2:0] * 30:27 aux_repeat[3:0] * 31:31 reserved[31:31] ******************************************************************/ dce_dmcu_psr_config_data_reg1; /******************************************************************* * MASTER_COMM_DATA_REG2 *******************************************************************/ dce_dmcu_psr_config_data_reg2; /******************************************************************* * MASTER_COMM_DATA_REG3 *******************************************************************/ dce_dmcu_psr_config_data_reg3; dce_dmcu_psr_config_data_wait_loop_reg1; struct dmcu *dce_dmcu_create( struct dc_context *ctx, const struct dce_dmcu_registers *regs, const struct dce_dmcu_shift *dmcu_shift, const struct dce_dmcu_mask *dmcu_mask); struct dmcu *dcn10_dmcu_create( struct dc_context *ctx, const struct dce_dmcu_registers *regs, const struct dce_dmcu_shift *dmcu_shift, const struct dce_dmcu_mask *dmcu_mask); struct dmcu *dcn20_dmcu_create( struct dc_context *ctx, const struct dce_dmcu_registers *regs, const struct dce_dmcu_shift *dmcu_shift, const struct dce_dmcu_mask *dmcu_mask); struct dmcu *dcn21_dmcu_create( struct dc_context *ctx, const struct dce_dmcu_registers *regs, const struct dce_dmcu_shift *dmcu_shift, const struct dce_dmcu_mask *dmcu_mask); void dce_dmcu_destroy(struct dmcu **dmcu); #endif /* _DCE_ABM_H_ */
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