dce_dmcu.c | Explore in Territory

/*
 * Copyright 2012-16 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "core_types.h"
#include "link_encoder.h"
#include "dce_dmcu.h"
#include "dm_services.h"
#include "reg_helper.h"
#include "fixed31_32.h"
#include "dc.h"

#define TO_DCE_DMCU(dmcu) …

#define REG(reg) …

#undef FN
#define FN(reg_name, field_name) …

#define CTX …

/* PSR related commands */
#define PSR_ENABLE …
#define PSR_EXIT …
#define PSR_SET …
#define PSR_SET_WAITLOOP …
#define MCP_INIT_DMCU …
#define MCP_INIT_IRAM …
#define MCP_SYNC_PHY_LOCK …
#define MCP_SYNC_PHY_UNLOCK …
#define MCP_BL_SET_PWM_FRAC …
#define CRC_WIN_NOTIFY …
#define CRC_STOP_UPDATE …
#define MCP_SEND_EDID_CEA …
#define EDID_CEA_CMD_ACK …
#define EDID_CEA_CMD_NACK …
#define MASTER_COMM_CNTL_REG__MASTER_COMM_INTERRUPT_MASK …

// PSP FW version
#define mmMP0_SMN_C2PMSG_58 …

//Register access policy version
#define mmMP0_SMN_C2PMSG_91 …

static const uint32_t abm_gain_stepsize = …;

static bool dce_dmcu_init(struct dmcu *dmcu)
{ … }

static bool dce_dmcu_load_iram(struct dmcu *dmcu,
			       unsigned int start_offset,
			       const char *src,
			       unsigned int bytes)
{ … }

static void dce_get_dmcu_psr_state(struct dmcu *dmcu, enum dc_psr_state *state)
{ … }

static void dce_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
{ … }

static bool dce_dmcu_setup_psr(struct dmcu *dmcu,
		struct dc_link *link,
		struct psr_context *psr_context)
{ … }

static bool dce_is_dmcu_initialized(struct dmcu *dmcu)
{ … }

static void dce_psr_wait_loop(
	struct dmcu *dmcu,
	unsigned int wait_loop_number)
{ … }

static void dce_get_psr_wait_loop(
		struct dmcu *dmcu, unsigned int *psr_wait_loop_number)
{ … }

static void dcn10_get_dmcu_version(struct dmcu *dmcu)
{ … }

static void dcn10_dmcu_enable_fractional_pwm(struct dmcu *dmcu,
		uint32_t fractional_pwm)
{ … }

static bool dcn10_dmcu_init(struct dmcu *dmcu)
{ … }

static bool dcn21_dmcu_init(struct dmcu *dmcu)
{ … }

static bool dcn10_dmcu_load_iram(struct dmcu *dmcu,
		unsigned int start_offset,
		const char *src,
		unsigned int bytes)
{ … }

static void dcn10_get_dmcu_psr_state(struct dmcu *dmcu, enum dc_psr_state *state)
{ … }

static void dcn10_dmcu_set_psr_enable(struct dmcu *dmcu, bool enable, bool wait)
{ … }

static bool dcn10_dmcu_setup_psr(struct dmcu *dmcu,
		struct dc_link *link,
		struct psr_context *psr_context)
{ … }

static void dcn10_psr_wait_loop(
	struct dmcu *dmcu,
	unsigned int wait_loop_number)
{ … }

static void dcn10_get_psr_wait_loop(
		struct dmcu *dmcu, unsigned int *psr_wait_loop_number)
{ … }

static bool dcn10_is_dmcu_initialized(struct dmcu *dmcu)
{ … }



static bool dcn20_lock_phy(struct dmcu *dmcu)
{ … }

static bool dcn20_unlock_phy(struct dmcu *dmcu)
{ … }

static bool dcn10_send_edid_cea(struct dmcu *dmcu,
		int offset,
		int total_length,
		uint8_t *data,
		int length)
{ … }

static bool dcn10_get_scp_results(struct dmcu *dmcu,
		uint32_t *cmd,
		uint32_t *data1,
		uint32_t *data2,
		uint32_t *data3)
{ … }

static bool dcn10_recv_amd_vsdb(struct dmcu *dmcu,
		int *version,
		int *min_frame_rate,
		int *max_frame_rate)
{ … }

static bool dcn10_recv_edid_cea_ack(struct dmcu *dmcu, int *offset)
{ … }


#if defined(CONFIG_DRM_AMD_SECURE_DISPLAY)
static void dcn10_forward_crc_window(struct dmcu *dmcu,
					struct rect *rect,
					struct otg_phy_mux *mux_mapping)
{ … }

static void dcn10_stop_crc_win_update(struct dmcu *dmcu,
					struct otg_phy_mux *mux_mapping)
{ … }
#endif

static const struct dmcu_funcs dce_funcs = …;

static const struct dmcu_funcs dcn10_funcs = …;

static const struct dmcu_funcs dcn20_funcs = …;

static const struct dmcu_funcs dcn21_funcs = …;

static void dce_dmcu_construct(
	struct dce_dmcu *dmcu_dce,
	struct dc_context *ctx,
	const struct dce_dmcu_registers *regs,
	const struct dce_dmcu_shift *dmcu_shift,
	const struct dce_dmcu_mask *dmcu_mask)
{ … }

static void dcn21_dmcu_construct(
		struct dce_dmcu *dmcu_dce,
		struct dc_context *ctx,
		const struct dce_dmcu_registers *regs,
		const struct dce_dmcu_shift *dmcu_shift,
		const struct dce_dmcu_mask *dmcu_mask)
{ … }

struct dmcu *dce_dmcu_create(
	struct dc_context *ctx,
	const struct dce_dmcu_registers *regs,
	const struct dce_dmcu_shift *dmcu_shift,
	const struct dce_dmcu_mask *dmcu_mask)
{ … }

struct dmcu *dcn10_dmcu_create(
	struct dc_context *ctx,
	const struct dce_dmcu_registers *regs,
	const struct dce_dmcu_shift *dmcu_shift,
	const struct dce_dmcu_mask *dmcu_mask)
{ … }

struct dmcu *dcn20_dmcu_create(
	struct dc_context *ctx,
	const struct dce_dmcu_registers *regs,
	const struct dce_dmcu_shift *dmcu_shift,
	const struct dce_dmcu_mask *dmcu_mask)
{ … }

struct dmcu *dcn21_dmcu_create(
	struct dc_context *ctx,
	const struct dce_dmcu_registers *regs,
	const struct dce_dmcu_shift *dmcu_shift,
	const struct dce_dmcu_mask *dmcu_mask)
{ … }

void dce_dmcu_destroy(struct dmcu **dmcu)
{ … }
linux/drivers/gpu/drm/amd/display/dc/dce/dce_dmcu.c
