linux/drivers/gpu/drm/amd/include/asic_reg/smu/smu_6_0_d.h

/*
 *
 * Copyright (C) 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included
 * in all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 */

#ifndef SMU_6_0_D_H
#define SMU_6_0_D_H

#define ixLCAC_MC0_CNTL
#define ixLCAC_MC0_OVR_SEL
#define ixLCAC_MC0_OVR_VAL
#define ixLCAC_MC1_CNTL
#define ixLCAC_MC1_OVR_SEL
#define ixLCAC_MC1_OVR_VAL
#define ixLCAC_MC2_CNTL
#define ixLCAC_MC2_OVR_SEL
#define ixLCAC_MC2_OVR_VAL
#define ixLCAC_MC3_CNTL
#define ixLCAC_MC3_OVR_SEL
#define ixLCAC_MC3_OVR_VAL
#define ixLCAC_MC4_CNTL
#define ixLCAC_MC4_OVR_SEL
#define ixLCAC_MC4_OVR_VAL
#define ixLCAC_MC5_CNTL
#define ixLCAC_MC5_OVR_SEL
#define ixLCAC_MC5_OVR_VAL
#define ixSMC_PC_C
#define ixTHM_TMON0_DEBUG
#define ixTHM_TMON0_INT_DATA
#define ixTHM_TMON0_RDIL0_DATA
#define ixTHM_TMON0_RDIL10_DATA
#define ixTHM_TMON0_RDIL11_DATA
#define ixTHM_TMON0_RDIL12_DATA
#define ixTHM_TMON0_RDIL13_DATA
#define ixTHM_TMON0_RDIL14_DATA
#define ixTHM_TMON0_RDIL15_DATA
#define ixTHM_TMON0_RDIL1_DATA
#define ixTHM_TMON0_RDIL2_DATA
#define ixTHM_TMON0_RDIL3_DATA
#define ixTHM_TMON0_RDIL4_DATA
#define ixTHM_TMON0_RDIL5_DATA
#define ixTHM_TMON0_RDIL6_DATA
#define ixTHM_TMON0_RDIL7_DATA
#define ixTHM_TMON0_RDIL8_DATA
#define ixTHM_TMON0_RDIL9_DATA
#define ixTHM_TMON0_RDIR0_DATA
#define ixTHM_TMON0_RDIR10_DATA
#define ixTHM_TMON0_RDIR11_DATA
#define ixTHM_TMON0_RDIR12_DATA
#define ixTHM_TMON0_RDIR13_DATA
#define ixTHM_TMON0_RDIR14_DATA
#define ixTHM_TMON0_RDIR15_DATA
#define ixTHM_TMON0_RDIR1_DATA
#define ixTHM_TMON0_RDIR2_DATA
#define ixTHM_TMON0_RDIR3_DATA
#define ixTHM_TMON0_RDIR4_DATA
#define ixTHM_TMON0_RDIR5_DATA
#define ixTHM_TMON0_RDIR6_DATA
#define ixTHM_TMON0_RDIR7_DATA
#define ixTHM_TMON0_RDIR8_DATA
#define ixTHM_TMON0_RDIR9_DATA
#define ixTHM_TMON1_DEBUG
#define ixTHM_TMON1_INT_DATA
#define ixTHM_TMON1_RDIL0_DATA
#define ixTHM_TMON1_RDIL10_DATA
#define ixTHM_TMON1_RDIL11_DATA
#define ixTHM_TMON1_RDIL12_DATA
#define ixTHM_TMON1_RDIL13_DATA
#define ixTHM_TMON1_RDIL14_DATA
#define ixTHM_TMON1_RDIL15_DATA
#define ixTHM_TMON1_RDIL1_DATA
#define ixTHM_TMON1_RDIL2_DATA
#define ixTHM_TMON1_RDIL3_DATA
#define ixTHM_TMON1_RDIL4_DATA
#define ixTHM_TMON1_RDIL5_DATA
#define ixTHM_TMON1_RDIL6_DATA
#define ixTHM_TMON1_RDIL7_DATA
#define ixTHM_TMON1_RDIL8_DATA
#define ixTHM_TMON1_RDIL9_DATA
#define ixTHM_TMON1_RDIR0_DATA
#define ixTHM_TMON1_RDIR10_DATA
#define ixTHM_TMON1_RDIR11_DATA
#define ixTHM_TMON1_RDIR12_DATA
#define ixTHM_TMON1_RDIR13_DATA
#define ixTHM_TMON1_RDIR14_DATA
#define ixTHM_TMON1_RDIR15_DATA
#define ixTHM_TMON1_RDIR1_DATA
#define ixTHM_TMON1_RDIR2_DATA
#define ixTHM_TMON1_RDIR3_DATA
#define ixTHM_TMON1_RDIR4_DATA
#define ixTHM_TMON1_RDIR5_DATA
#define ixTHM_TMON1_RDIR6_DATA
#define ixTHM_TMON1_RDIR7_DATA
#define ixTHM_TMON1_RDIR8_DATA
#define ixTHM_TMON1_RDIR9_DATA
#define mmGPIOPAD_A
#define mmGPIOPAD_EN
#define mmGPIOPAD_EXTERN_TRIG_CNTL
#define mmGPIOPAD_INT_EN
#define mmGPIOPAD_INT_POLARITY
#define mmGPIOPAD_INT_STAT
#define mmGPIOPAD_INT_STAT_AK
#define mmGPIOPAD_INT_STAT_EN
#define mmGPIOPAD_INT_TYPE
#define mmGPIOPAD_MASK
#define mmGPIOPAD_PD_EN
#define mmGPIOPAD_PINSTRAPS
#define mmGPIOPAD_PU_EN
#define mmGPIOPAD_RCVR_SEL
#define mmGPIOPAD_STRENGTH
#define mmGPIOPAD_SW_INT_STAT
#define mmGPIOPAD_Y
#define mmSMC_IND_ACCESS_CNTL
#define mmSMC_IND_DATA_0
#define mmSMC_IND_DATA
#define mmSMC_IND_DATA_1
#define mmSMC_IND_DATA_2
#define mmSMC_IND_DATA_3
#define mmSMC_IND_INDEX_0
#define mmSMC_IND_INDEX
#define mmSMC_IND_INDEX_1
#define mmSMC_IND_INDEX_2
#define mmSMC_IND_INDEX_3
#define mmSMC_MESSAGE_0
#define mmSMC_MESSAGE_1
#define mmSMC_MESSAGE_2
#define mmSMC_RESP_0
#define mmSMC_RESP_1
#define mmSMC_RESP_2

#endif