dce110_hwseq.c | Explore in Territory

/*
 * Copyright 2015 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dm_services.h"
#include "dc.h"
#include "dc_bios_types.h"
#include "core_types.h"
#include "core_status.h"
#include "resource.h"
#include "dm_helpers.h"
#include "dce110_hwseq.h"
#include "dce110/dce110_timing_generator.h"
#include "dce/dce_hwseq.h"
#include "gpio_service_interface.h"

#include "dce110/dce110_compressor.h"

#include "bios/bios_parser_helper.h"
#include "timing_generator.h"
#include "mem_input.h"
#include "opp.h"
#include "ipp.h"
#include "transform.h"
#include "stream_encoder.h"
#include "link_encoder.h"
#include "link_enc_cfg.h"
#include "link_hwss.h"
#include "link.h"
#include "dccg.h"
#include "clock_source.h"
#include "clk_mgr.h"
#include "abm.h"
#include "audio.h"
#include "reg_helper.h"
#include "panel_cntl.h"
#include "dc_state_priv.h"
#include "dpcd_defs.h"
/* include DCE11 register header files */
#include "dce/dce_11_0_d.h"
#include "dce/dce_11_0_sh_mask.h"
#include "custom_float.h"

#include "atomfirmware.h"

#include "dcn10/dcn10_hwseq.h"

#define GAMMA_HW_POINTS_NUM …

/*
 * All values are in milliseconds;
 * For eDP, after power-up/power/down,
 * 300/500 msec max. delay from LCDVCC to black video generation
 */
#define PANEL_POWER_UP_TIMEOUT …
#define PANEL_POWER_DOWN_TIMEOUT …
#define HPD_CHECK_INTERVAL …
#define OLED_POST_T7_DELAY …
#define OLED_PRE_T11_DELAY …

#define CTX …

#define DC_LOGGER …
#define DC_LOGGER_INIT() …

#define REG(reg) …

#undef FN
#define FN(reg_name, field_name) …

struct dce110_hw_seq_reg_offsets { … };

static const struct dce110_hw_seq_reg_offsets reg_offsets[] = …;

#define HW_REG_BLND(reg, id) …

#define HW_REG_CRTC(reg, id) …

#define MAX_WATERMARK …
#define SAFE_NBP_MARK …

/*******************************************************************************
 * Private definitions
 ******************************************************************************/
/***************************PIPE_CONTROL***********************************/
static void dce110_init_pte(struct dc_context *ctx)
{ … }
/**************************************************************************/

static void enable_display_pipe_clock_gating(
	struct dc_context *ctx,
	bool clock_gating)
{ … }

static bool dce110_enable_display_power_gating(
	struct dc *dc,
	uint8_t controller_id,
	struct dc_bios *dcb,
	enum pipe_gating_control power_gating)
{ … }

static void dce110_prescale_params(struct ipp_prescale_params *prescale_params,
		const struct dc_plane_state *plane_state)
{ … }

static bool
dce110_set_input_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
			       const struct dc_plane_state *plane_state)
{ … }

static bool convert_to_custom_float(struct pwl_result_data *rgb_resulted,
				    struct curve_points *arr_points,
				    uint32_t hw_points_num)
{ … }

#define MAX_LOW_POINT …
#define NUMBER_REGIONS …
#define NUMBER_SW_SEGMENTS …

static bool
dce110_translate_regamma_to_hw_format(const struct dc_transfer_func *output_tf,
				      struct pwl_params *regamma_params)
{ … }

static bool
dce110_set_output_transfer_func(struct dc *dc, struct pipe_ctx *pipe_ctx,
				const struct dc_stream_state *stream)
{ … }

void dce110_update_info_frame(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_enable_stream(struct pipe_ctx *pipe_ctx)
{ … }

static enum bp_result link_transmitter_control(
		struct dc_bios *bios,
	struct bp_transmitter_control *cntl)
{ … }

/*
 * @brief
 * eDP only.
 */
void dce110_edp_wait_for_hpd_ready(
		struct dc_link *link,
		bool power_up)
{ … }

void dce110_edp_power_control(
		struct dc_link *link,
		bool power_up)
{ … }

void dce110_edp_wait_for_T12(
		struct dc_link *link)
{ … }
/*todo: cloned in stream enc, fix*/
/*
 * @brief
 * eDP only. Control the backlight of the eDP panel
 */
void dce110_edp_backlight_control(
		struct dc_link *link,
		bool enable)
{ … }

void dce110_enable_audio_stream(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_disable_audio_stream(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_disable_stream(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_unblank_stream(struct pipe_ctx *pipe_ctx,
		struct dc_link_settings *link_settings)
{ … }

void dce110_blank_stream(struct pipe_ctx *pipe_ctx)
{ … }


void dce110_set_avmute(struct pipe_ctx *pipe_ctx, bool enable)
{ … }

static enum audio_dto_source translate_to_dto_source(enum controller_id crtc_id)
{ … }

static void populate_audio_dp_link_info(
	const struct pipe_ctx *pipe_ctx,
	struct audio_dp_link_info *dp_link_info)
{ … }

static void build_audio_output(
	struct dc_state *state,
	const struct pipe_ctx *pipe_ctx,
	struct audio_output *audio_output)
{ … }

static void program_scaler(const struct dc *dc,
		const struct pipe_ctx *pipe_ctx)
{ … }

static enum dc_status dce110_enable_stream_timing(
		struct pipe_ctx *pipe_ctx,
		struct dc_state *context,
		struct dc *dc)
{ … }

enum dc_status dce110_apply_single_controller_ctx_to_hw(
		struct pipe_ctx *pipe_ctx,
		struct dc_state *context,
		struct dc *dc)
{ … }

/******************************************************************************/

static void power_down_encoders(struct dc *dc)
{ … }

static void power_down_controllers(struct dc *dc)
{ … }

static void power_down_clock_sources(struct dc *dc)
{ … }

static void power_down_all_hw_blocks(struct dc *dc)
{ … }

static void disable_vga_and_power_gate_all_controllers(
		struct dc *dc)
{ … }


static void get_edp_streams(struct dc_state *context,
		struct dc_stream_state **edp_streams,
		int *edp_stream_num)
{ … }

static void get_edp_links_with_sink(
		struct dc *dc,
		struct dc_link **edp_links_with_sink,
		int *edp_with_sink_num)
{ … }

/*
 * When ASIC goes from VBIOS/VGA mode to driver/accelerated mode we need:
 *  1. Power down all DC HW blocks
 *  2. Disable VGA engine on all controllers
 *  3. Enable power gating for controller
 *  4. Set acc_mode_change bit (VBIOS will clear this bit when going to FSDOS)
 */
void dce110_enable_accelerated_mode(struct dc *dc, struct dc_state *context)
{ … }

static uint32_t compute_pstate_blackout_duration(
	struct bw_fixed blackout_duration,
	const struct dc_stream_state *stream)
{ … }

static void dce110_set_displaymarks(
	const struct dc *dc,
	struct dc_state *context)
{ … }

void dce110_set_safe_displaymarks(
		struct resource_context *res_ctx,
		const struct resource_pool *pool)
{ … }

/*******************************************************************************
 * Public functions
 ******************************************************************************/

static void set_drr(struct pipe_ctx **pipe_ctx,
		int num_pipes, struct dc_crtc_timing_adjust adjust)
{ … }

static void get_position(struct pipe_ctx **pipe_ctx,
		int num_pipes,
		struct crtc_position *position)
{ … }

static void set_static_screen_control(struct pipe_ctx **pipe_ctx,
		int num_pipes, const struct dc_static_screen_params *params)
{ … }

/*
 *  Check if FBC can be enabled
 */
static bool should_enable_fbc(struct dc *dc,
		struct dc_state *context,
		uint32_t *pipe_idx)
{ … }

/*
 *  Enable FBC
 */
static void enable_fbc(
		struct dc *dc,
		struct dc_state *context)
{ … }

static void dce110_reset_hw_ctx_wrap(
		struct dc *dc,
		struct dc_state *context)
{ … }

static void dce110_setup_audio_dto(
		struct dc *dc,
		struct dc_state *context)
{ … }

static bool dce110_is_hpo_enabled(struct dc_state *context)
{ … }

enum dc_status dce110_apply_ctx_to_hw(
		struct dc *dc,
		struct dc_state *context)
{ … }

/*******************************************************************************
 * Front End programming
 ******************************************************************************/
static void set_default_colors(struct pipe_ctx *pipe_ctx)
{ … }


/*******************************************************************************
 * In order to turn on/off specific surface we will program
 * Blender + CRTC
 *
 * In case that we have two surfaces and they have a different visibility
 * we can't turn off the CRTC since it will turn off the entire display
 *
 * |----------------------------------------------- |
 * |bottom pipe|curr pipe  |              |         |
 * |Surface    |Surface    | Blender      |  CRCT   |
 * |visibility |visibility | Configuration|         |
 * |------------------------------------------------|
 * |   off     |    off    | CURRENT_PIPE | blank   |
 * |   off     |    on     | CURRENT_PIPE | unblank |
 * |   on      |    off    | OTHER_PIPE   | unblank |
 * |   on      |    on     | BLENDING     | unblank |
 * -------------------------------------------------|
 *
 ******************************************************************************/
static void program_surface_visibility(const struct dc *dc,
		struct pipe_ctx *pipe_ctx)
{ … }

static void program_gamut_remap(struct pipe_ctx *pipe_ctx)
{ … }
static void update_plane_addr(const struct dc *dc,
		struct pipe_ctx *pipe_ctx)
{ … }

static void dce110_update_pending_status(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_power_down(struct dc *dc)
{ … }

static bool wait_for_reset_trigger_to_occur(
	struct dc_context *dc_ctx,
	struct timing_generator *tg)
{ … }

/* Enable timing synchronization for a group of Timing Generators. */
static void dce110_enable_timing_synchronization(
		struct dc *dc,
		struct dc_state *state,
		int group_index,
		int group_size,
		struct pipe_ctx *grouped_pipes[])
{ … }

static void dce110_enable_per_frame_crtc_position_reset(
		struct dc *dc,
		int group_size,
		struct pipe_ctx *grouped_pipes[])
{ … }

static void init_pipes(struct dc *dc, struct dc_state *context)
{ … }

static void init_hw(struct dc *dc)
{ … }


void dce110_prepare_bandwidth(
		struct dc *dc,
		struct dc_state *context)
{ … }

void dce110_optimize_bandwidth(
		struct dc *dc,
		struct dc_state *context)
{ … }

static void dce110_program_front_end_for_pipe(
		struct dc *dc, struct pipe_ctx *pipe_ctx)
{ … }

static void dce110_apply_ctx_for_surface(
		struct dc *dc,
		const struct dc_stream_state *stream,
		int num_planes,
		struct dc_state *context)
{ … }

static void dce110_post_unlock_program_front_end(
		struct dc *dc,
		struct dc_state *context)
{ … }

static void dce110_power_down_fe(struct dc *dc, struct dc_state *state, struct pipe_ctx *pipe_ctx)
{ … }

static void dce110_wait_for_mpcc_disconnect(
		struct dc *dc,
		struct resource_pool *res_pool,
		struct pipe_ctx *pipe_ctx)
{ … }

static void program_output_csc(struct dc *dc,
		struct pipe_ctx *pipe_ctx,
		enum dc_color_space colorspace,
		uint16_t *matrix,
		int opp_id)
{ … }

static void dce110_set_cursor_position(struct pipe_ctx *pipe_ctx)
{ … }

static void dce110_set_cursor_attribute(struct pipe_ctx *pipe_ctx)
{ … }

bool dce110_set_backlight_level(struct pipe_ctx *pipe_ctx,
		uint32_t backlight_pwm_u16_16,
		uint32_t frame_ramp)
{ … }

void dce110_set_abm_immediate_disable(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_set_pipe(struct pipe_ctx *pipe_ctx)
{ … }

void dce110_enable_lvds_link_output(struct dc_link *link,
		const struct link_resource *link_res,
		enum clock_source_id clock_source,
		uint32_t pixel_clock)
{ … }

void dce110_enable_tmds_link_output(struct dc_link *link,
		const struct link_resource *link_res,
		enum signal_type signal,
		enum clock_source_id clock_source,
		enum dc_color_depth color_depth,
		uint32_t pixel_clock)
{ … }

void dce110_enable_dp_link_output(
		struct dc_link *link,
		const struct link_resource *link_res,
		enum signal_type signal,
		enum clock_source_id clock_source,
		const struct dc_link_settings *link_settings)
{ … }

void dce110_disable_link_output(struct dc_link *link,
		const struct link_resource *link_res,
		enum signal_type signal)
{ … }

static const struct hw_sequencer_funcs dce110_funcs = …;

static const struct hwseq_private_funcs dce110_private_funcs = …;

void dce110_hw_sequencer_construct(struct dc *dc)
{ … }
linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/dce110_hwseq.c
