linux/drivers/gpu/drm/amd/display/dc/hwss/dcn201/dcn201_hwseq.c

/*
 * Copyright 2016 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dm_services.h"
#include "basics/dc_common.h"
#include "core_types.h"
#include "resource.h"
#include "dcn201_hwseq.h"
#include "dcn201/dcn201_optc.h"
#include "dce/dce_hwseq.h"
#include "hubp.h"
#include "dchubbub.h"
#include "timing_generator.h"
#include "opp.h"
#include "ipp.h"
#include "mpc.h"
#include "dccg.h"
#include "clk_mgr.h"
#include "reg_helper.h"

#define CTX …

#define REG(reg) …

#define DC_LOGGER …

#undef FN
#define FN(reg_name, field_name) …

static bool patch_address_for_sbs_tb_stereo(
		struct pipe_ctx *pipe_ctx, PHYSICAL_ADDRESS_LOC *addr)
{ … }

static bool gpu_addr_to_uma(struct dce_hwseq *hwseq,
		PHYSICAL_ADDRESS_LOC *addr)
{ … }

static void plane_address_in_gpu_space_to_uma(struct dce_hwseq *hwseq,
		struct dc_plane_address *addr)
{ … }

void dcn201_update_plane_addr(const struct dc *dc, struct pipe_ctx *pipe_ctx)
{ … }

/* Blank pixel data during initialization */
void dcn201_init_blank(
		struct dc *dc,
		struct timing_generator *tg)
{ … }

static void read_mmhub_vm_setup(struct dce_hwseq *hws)
{ … }

void dcn201_init_hw(struct dc *dc)
{ … }

/* trigger HW to start disconnect plane from stream on the next vsync */
void dcn201_plane_atomic_disconnect(struct dc *dc,
		struct dc_state *state,
		struct pipe_ctx *pipe_ctx)
{ … }

void dcn201_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
{ … }

void dcn201_pipe_control_lock(
	struct dc *dc,
	struct pipe_ctx *pipe,
	bool lock)
{ … }

void dcn201_set_cursor_attribute(struct pipe_ctx *pipe_ctx)
{ … }

void dcn201_set_dmdata_attributes(struct pipe_ctx *pipe_ctx)
{ … }

void dcn201_unblank_stream(struct pipe_ctx *pipe_ctx,
		struct dc_link_settings *link_settings)
{ … }