linux/drivers/gpu/drm/amd/display/dc/irq/dcn32/irq_service_dcn32.c

/*
 * Copyright 2022 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dm_services.h"
#include "include/logger_interface.h"
#include "../dce110/irq_service_dce110.h"

#include "dcn/dcn_3_2_0_offset.h"
#include "dcn/dcn_3_2_0_sh_mask.h"

#include "irq_service_dcn32.h"

#include "ivsrcid/dcn/irqsrcs_dcn_1_0.h"

#define DCN_BASE__INST0_SEG2

static enum dc_irq_source to_dal_irq_source_dcn32(
		struct irq_service *irq_service,
		uint32_t src_id,
		uint32_t ext_id)
{}

static bool hpd_ack(
	struct irq_service *irq_service,
	const struct irq_source_info *info)
{}

static struct irq_source_info_funcs hpd_irq_info_funcs  =;

static struct irq_source_info_funcs hpd_rx_irq_info_funcs =;

static struct irq_source_info_funcs pflip_irq_info_funcs =;

static struct irq_source_info_funcs vupdate_no_lock_irq_info_funcs =;

static struct irq_source_info_funcs vblank_irq_info_funcs =;

static struct irq_source_info_funcs outbox_irq_info_funcs =;

static struct irq_source_info_funcs vline0_irq_info_funcs =;

#undef BASE_INNER
#define BASE_INNER(seg)

/* compile time expand base address. */
#define BASE(seg)

#define SRI(reg_name, block, id)

#define SRI_DMUB(reg_name)

#define IRQ_REG_ENTRY(block, reg_num, reg1, mask1, reg2, mask2) \

#define IRQ_REG_ENTRY_DMUB(reg1, mask1, reg2, mask2) \

#define hpd_int_entry(reg_num)

#define hpd_rx_int_entry(reg_num)
#define pflip_int_entry(reg_num)

/* vupdate_no_lock_int_entry maps to DC_IRQ_SOURCE_VUPDATEx, to match semantic
 * of DCE's DC_IRQ_SOURCE_VUPDATEx.
 */
#define vupdate_no_lock_int_entry(reg_num)

#define vblank_int_entry(reg_num)

#define vline0_int_entry(reg_num)
#define dmub_outbox_int_entry()

#define dummy_irq_entry()

#define i2c_int_entry(reg_num)

#define dp_sink_int_entry(reg_num)

#define gpio_pad_int_entry(reg_num)

#define dc_underflow_int_entry(reg_num)

static struct irq_source_info_funcs dummy_irq_info_funcs =;

static const struct irq_source_info
irq_source_info_dcn32[DAL_IRQ_SOURCES_NUMBER] =;

static const struct irq_service_funcs irq_service_funcs_dcn32 =;

static void dcn32_irq_construct(
	struct irq_service *irq_service,
	struct irq_service_init_data *init_data)
{}

struct irq_service *dal_irq_service_dcn32_create(
	struct irq_service_init_data *init_data)
{}