/* * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include "dm_services.h" #include "link_encoder.h" #include "stream_encoder.h" #include "resource.h" #include "include/irq_service_interface.h" #include "dce110/dce110_resource.h" #include "dce110/dce110_timing_generator.h" #include "irq/dce110/irq_service_dce110.h" #include "dce/dce_mem_input.h" #include "dce/dce_transform.h" #include "dce/dce_link_encoder.h" #include "dce/dce_stream_encoder.h" #include "dce/dce_audio.h" #include "dce/dce_opp.h" #include "dce/dce_ipp.h" #include "dce/dce_clock_source.h" #include "dce/dce_hwseq.h" #include "dce112/dce112_hwseq.h" #include "dce/dce_abm.h" #include "dce/dce_dmcu.h" #include "dce/dce_aux.h" #include "dce/dce_i2c.h" #include "dce/dce_panel_cntl.h" #include "reg_helper.h" #include "dce/dce_11_2_d.h" #include "dce/dce_11_2_sh_mask.h" #include "dce100/dce100_resource.h" #include "dce112_resource.h" #define DC_LOGGER … #ifndef mmDP_DPHY_INTERNAL_CTRL #define mmDP_DPHY_INTERNAL_CTRL … #define mmDP0_DP_DPHY_INTERNAL_CTRL … #define mmDP1_DP_DPHY_INTERNAL_CTRL … #define mmDP2_DP_DPHY_INTERNAL_CTRL … #define mmDP3_DP_DPHY_INTERNAL_CTRL … #define mmDP4_DP_DPHY_INTERNAL_CTRL … #define mmDP5_DP_DPHY_INTERNAL_CTRL … #define mmDP6_DP_DPHY_INTERNAL_CTRL … #define mmDP7_DP_DPHY_INTERNAL_CTRL … #define mmDP8_DP_DPHY_INTERNAL_CTRL … #endif #ifndef mmBIOS_SCRATCH_2 #define mmBIOS_SCRATCH_2 … #define mmBIOS_SCRATCH_3 … #define mmBIOS_SCRATCH_6 … #endif #ifndef mmDP_DPHY_BS_SR_SWAP_CNTL #define mmDP_DPHY_BS_SR_SWAP_CNTL … #define mmDP0_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP1_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP2_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP3_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP4_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP5_DP_DPHY_BS_SR_SWAP_CNTL … #define mmDP6_DP_DPHY_BS_SR_SWAP_CNTL … #endif #ifndef mmDP_DPHY_FAST_TRAINING #define mmDP_DPHY_FAST_TRAINING … #define mmDP0_DP_DPHY_FAST_TRAINING … #define mmDP1_DP_DPHY_FAST_TRAINING … #define mmDP2_DP_DPHY_FAST_TRAINING … #define mmDP3_DP_DPHY_FAST_TRAINING … #define mmDP4_DP_DPHY_FAST_TRAINING … #define mmDP5_DP_DPHY_FAST_TRAINING … #define mmDP6_DP_DPHY_FAST_TRAINING … #endif enum dce112_clk_src_array_id { … }; static const struct dce110_timing_generator_offsets dce112_tg_offsets[] = …; /* set register offset */ #define SR(reg_name) … /* set register offset with instance */ #define SRI(reg_name, block, id) … static const struct dce_dmcu_registers dmcu_regs = …; static const struct dce_dmcu_shift dmcu_shift = …; static const struct dce_dmcu_mask dmcu_mask = …; static const struct dce_abm_registers abm_regs = …; static const struct dce_abm_shift abm_shift = …; static const struct dce_abm_mask abm_mask = …; static const struct dce110_aux_registers_shift aux_shift = …; static const struct dce110_aux_registers_mask aux_mask = …; #define ipp_regs(id) … static const struct dce_ipp_registers ipp_regs[] = …; static const struct dce_ipp_shift ipp_shift = …; static const struct dce_ipp_mask ipp_mask = …; #define transform_regs(id) … static const struct dce_transform_registers xfm_regs[] = …; static const struct dce_transform_shift xfm_shift = …; static const struct dce_transform_mask xfm_mask = …; #define aux_regs(id) … static const struct dce110_link_enc_aux_registers link_enc_aux_regs[] = …; static const struct dce_panel_cntl_registers panel_cntl_regs[] = …; static const struct dce_panel_cntl_shift panel_cntl_shift = …; static const struct dce_panel_cntl_mask panel_cntl_mask = …; #define hpd_regs(id) … static const struct dce110_link_enc_hpd_registers link_enc_hpd_regs[] = …; #define link_regs(id) … static const struct dce110_link_enc_registers link_enc_regs[] = …; #define stream_enc_regs(id) … static const struct dce110_stream_enc_registers stream_enc_regs[] = …; static const struct dce_stream_encoder_shift se_shift = …; static const struct dce_stream_encoder_mask se_mask = …; #define opp_regs(id) … static const struct dce_opp_registers opp_regs[] = …; static const struct dce_opp_shift opp_shift = …; static const struct dce_opp_mask opp_mask = …; #define aux_engine_regs(id) … static const struct dce110_aux_registers aux_engine_regs[] = …; #define audio_regs(id) … static const struct dce_audio_registers audio_regs[] = …; static const struct dce_audio_shift audio_shift = …; static const struct dce_audio_mask audio_mask = …; #define clk_src_regs(index, id) … static const struct dce110_clk_src_regs clk_src_regs[] = …; static const struct dce110_clk_src_shift cs_shift = …; static const struct dce110_clk_src_mask cs_mask = …; static const struct bios_registers bios_regs = …; static const struct resource_caps polaris_10_resource_cap = …; static const struct resource_caps polaris_11_resource_cap = …; static const struct dc_plane_cap plane_cap = …; static const struct dc_debug_options debug_defaults = …; #define CTX … #define REG(reg) … #ifndef mmCC_DC_HDMI_STRAPS #define mmCC_DC_HDMI_STRAPS … #define CC_DC_HDMI_STRAPS__HDMI_DISABLE_MASK … #define CC_DC_HDMI_STRAPS__HDMI_DISABLE__SHIFT … #define CC_DC_HDMI_STRAPS__AUDIO_STREAM_NUMBER_MASK … #define CC_DC_HDMI_STRAPS__AUDIO_STREAM_NUMBER__SHIFT … #endif static int map_transmitter_id_to_phy_instance( enum transmitter transmitter) { … } static void read_dce_straps( struct dc_context *ctx, struct resource_straps *straps) { … } static struct audio *create_audio( struct dc_context *ctx, unsigned int inst) { … } static struct timing_generator *dce112_timing_generator_create( struct dc_context *ctx, uint32_t instance, const struct dce110_timing_generator_offsets *offsets) { … } static struct stream_encoder *dce112_stream_encoder_create( enum engine_id eng_id, struct dc_context *ctx) { … } #define SRII(reg_name, block, id) … static const struct dce_hwseq_registers hwseq_reg = …; static const struct dce_hwseq_shift hwseq_shift = …; static const struct dce_hwseq_mask hwseq_mask = …; static struct dce_hwseq *dce112_hwseq_create( struct dc_context *ctx) { … } static const struct resource_create_funcs res_create_funcs = …; #define mi_inst_regs(id) … static const struct dce_mem_input_registers mi_regs[] = …; static const struct dce_mem_input_shift mi_shifts = …; static const struct dce_mem_input_mask mi_masks = …; static struct mem_input *dce112_mem_input_create( struct dc_context *ctx, uint32_t inst) { … } static void dce112_transform_destroy(struct transform **xfm) { … } static struct transform *dce112_transform_create( struct dc_context *ctx, uint32_t inst) { … } static const struct encoder_feature_support link_enc_feature = …; static struct link_encoder *dce112_link_encoder_create( struct dc_context *ctx, const struct encoder_init_data *enc_init_data) { … } static struct panel_cntl *dce112_panel_cntl_create(const struct panel_cntl_init_data *init_data) { … } static struct input_pixel_processor *dce112_ipp_create( struct dc_context *ctx, uint32_t inst) { … } static struct output_pixel_processor *dce112_opp_create( struct dc_context *ctx, uint32_t inst) { … } static struct dce_aux *dce112_aux_engine_create( struct dc_context *ctx, uint32_t inst) { … } #define i2c_inst_regs(id) … static const struct dce_i2c_registers i2c_hw_regs[] = …; static const struct dce_i2c_shift i2c_shifts = …; static const struct dce_i2c_mask i2c_masks = …; static struct dce_i2c_hw *dce112_i2c_hw_create( struct dc_context *ctx, uint32_t inst) { … } static struct clock_source *dce112_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, enum clock_source_id id, const struct dce110_clk_src_regs *regs, bool dp_clk_src) { … } static void dce112_clock_source_destroy(struct clock_source **clk_src) { … } static void dce112_resource_destruct(struct dce110_resource_pool *pool) { … } static struct clock_source *find_matching_pll( struct resource_context *res_ctx, const struct resource_pool *pool, const struct dc_stream_state *const stream) { … } static enum dc_status build_mapped_resource( const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) { … } bool dce112_validate_bandwidth( struct dc *dc, struct dc_state *context, bool fast_validate) { … } enum dc_status resource_map_phy_clock_resources( const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) { … } static bool dce112_validate_surface_sets( struct dc_state *context) { … } enum dc_status dce112_add_stream_to_ctx( struct dc *dc, struct dc_state *new_ctx, struct dc_stream_state *dc_stream) { … } static enum dc_status dce112_validate_global( struct dc *dc, struct dc_state *context) { … } static void dce112_destroy_resource_pool(struct resource_pool **pool) { … } static const struct resource_funcs dce112_res_pool_funcs = …; static void bw_calcs_data_update_from_pplib(struct dc *dc) { … } static const struct resource_caps *dce112_resource_cap( struct hw_asic_id *asic_id) { … } static bool dce112_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dce110_resource_pool *pool) { … } struct resource_pool *dce112_create_resource_pool( uint8_t num_virtual_links, struct dc *dc) { … }
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