/* Copyright 2012-17 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #ifndef __DC_DWBC_DCN10_H__ #define __DC_DWBC_DCN10_H__ /* DCN */ #define BASE_INNER(seg) … #define BASE(seg) … #define SR(reg_name) … #define SRI(reg_name, block, id) … #define SRII(reg_name, block, id) … #define SF(reg_name, field_name, post_fix) … #define DWBC_COMMON_REG_LIST_DCN1_0(inst) … #define DWBC_COMMON_MASK_SH_LIST_DCN1_0(mask_sh) … #define DWBC_REG_FIELD_LIST(type) …\ struct dcn10_dwbc_registers { … }; struct dcn10_dwbc_mask { … }; struct dcn10_dwbc_shift { … }; struct dcn10_dwbc { … }; void dcn10_dwbc_construct(struct dcn10_dwbc *dwbc10, struct dc_context *ctx, const struct dcn10_dwbc_registers *dwbc_regs, const struct dcn10_dwbc_shift *dwbc_shift, const struct dcn10_dwbc_mask *dwbc_mask, int inst); #endif
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