linux/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_opp.h

/* Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DC_OPP_DCN20_H__
#define __DC_OPP_DCN20_H__

#include "dcn10/dcn10_opp.h"

#define TO_DCN20_OPP(opp)

#define OPP_SF(reg_name, field_name, post_fix)

#define OPP_DPG_REG_LIST(id)

#define OPP_REG_LIST_DCN20(id)

#define OPP_REG_VARIABLE_LIST_DCN2_0

#define OPP_DPG_MASK_SH_LIST(mask_sh)

#define OPP_MASK_SH_LIST_DCN20(mask_sh)

#define OPP_DCN20_REG_FIELD_LIST(type)

struct dcn20_opp_registers {};

struct dcn20_opp_shift {};

struct dcn20_opp_mask {};

struct dcn20_opp {};

void dcn20_opp_construct(struct dcn20_opp *oppn20,
	struct dc_context *ctx,
	uint32_t inst,
	const struct dcn20_opp_registers *regs,
	const struct dcn20_opp_shift *opp_shift,
	const struct dcn20_opp_mask *opp_mask);

void opp2_set_disp_pattern_generator(
	struct output_pixel_processor *opp,
	enum controller_dp_test_pattern test_pattern,
	enum controller_dp_color_space color_space,
	enum dc_color_depth color_depth,
	const struct tg_color *solid_color,
	int width,
	int height,
	int offset);

void opp2_program_dpg_dimensions(
		struct output_pixel_processor *opp,
		int width, int height);

bool opp2_dpg_is_blanked(struct output_pixel_processor *opp);

bool opp2_dpg_is_pending(struct output_pixel_processor *opp);

void opp2_dpg_set_blank_color(
		struct output_pixel_processor *opp,
		const struct tg_color *color);

void opp2_program_left_edge_extra_pixel (
		struct output_pixel_processor *opp,
		enum dc_pixel_encoding pixel_encoding, bool is_primary);

uint32_t opp2_get_left_edge_extra_pixel_count(struct output_pixel_processor *opp,
		enum dc_pixel_encoding pixel_encoding, bool is_primary);
#endif