/* * Copyright 2016 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include "dm_services.h" #include "dc.h" #include "dcn201/dcn201_init.h" #include "dml/dcn20/dcn20_fpu.h" #include "resource.h" #include "include/irq_service_interface.h" #include "dcn201_resource.h" #include "dcn20/dcn20_resource.h" #include "dcn10/dcn10_hubp.h" #include "dcn10/dcn10_ipp.h" #include "dcn201/dcn201_mpc.h" #include "dcn201/dcn201_hubp.h" #include "irq/dcn201/irq_service_dcn201.h" #include "dcn201/dcn201_dpp.h" #include "dcn201/dcn201_hubbub.h" #include "dcn201/dcn201_dccg.h" #include "dcn201/dcn201_optc.h" #include "dcn201/dcn201_hwseq.h" #include "dce110/dce110_hwseq.h" #include "dcn201/dcn201_opp.h" #include "dcn201/dcn201_link_encoder.h" #include "dcn20/dcn20_stream_encoder.h" #include "dce/dce_clock_source.h" #include "dce/dce_audio.h" #include "dce/dce_hwseq.h" #include "virtual/virtual_stream_encoder.h" #include "dce110/dce110_resource.h" #include "dce/dce_aux.h" #include "dce/dce_i2c.h" #include "dcn10/dcn10_resource.h" #include "cyan_skillfish_ip_offset.h" #include "dcn/dcn_2_0_3_offset.h" #include "dcn/dcn_2_0_3_sh_mask.h" #include "dpcs/dpcs_2_0_3_offset.h" #include "dpcs/dpcs_2_0_3_sh_mask.h" #include "mmhub/mmhub_2_0_0_offset.h" #include "mmhub/mmhub_2_0_0_sh_mask.h" #include "nbio/nbio_7_4_offset.h" #include "reg_helper.h" #define MIN_DISP_CLK_KHZ … #define MIN_DPP_CLK_KHZ … static struct _vcs_dpi_ip_params_st dcn201_ip = …; static struct _vcs_dpi_soc_bounding_box_st dcn201_soc = …; enum dcn20_clk_src_array_id { … }; /* begin ********************* * macros to expend register list macro defined in HW object header file */ /* DCN */ #undef BASE_INNER #define BASE_INNER(seg) … #define BASE(seg) … #define SR(reg_name) … #define SRI(reg_name, block, id) … #define SRIR(var_name, reg_name, block, id) … #define SRII(reg_name, block, id) … #define SRI_IX(reg_name, block, id) … #define DCCG_SRII(reg_name, block, id) … #define VUPDATE_SRII(reg_name, block, id) … /* NBIO */ #define NBIO_BASE_INNER(seg) … #define NBIO_BASE(seg) … #define NBIO_SR(reg_name) … /* MMHUB */ #define MMHUB_BASE_INNER(seg) … #define MMHUB_BASE(seg) … #define MMHUB_SR(reg_name) … static const struct bios_registers bios_regs = …; #define clk_src_regs(index, pllid) … static const struct dce110_clk_src_regs clk_src_regs[] = …; static const struct dce110_clk_src_shift cs_shift = …; static const struct dce110_clk_src_mask cs_mask = …; #define audio_regs(id) … static const struct dce_audio_registers audio_regs[] = …; #define DCE120_AUD_COMMON_MASK_SH_LIST(mask_sh) … static const struct dce_audio_shift audio_shift = …; static const struct dce_audio_mask audio_mask = …; #define stream_enc_regs(id) … static const struct dcn10_stream_enc_registers stream_enc_regs[] = …; static const struct dcn10_stream_encoder_shift se_shift = …; static const struct dcn10_stream_encoder_mask se_mask = …; static const struct dce110_aux_registers_shift aux_shift = …; static const struct dce110_aux_registers_mask aux_mask = …; #define aux_regs(id) … static const struct dcn10_link_enc_aux_registers link_enc_aux_regs[] = …; #define hpd_regs(id) … static const struct dcn10_link_enc_hpd_registers link_enc_hpd_regs[] = …; #define link_regs(id, phyid) … static const struct dcn10_link_enc_registers link_enc_regs[] = …; #define LINK_ENCODER_MASK_SH_LIST_DCN201(mask_sh) … static const struct dcn10_link_enc_shift le_shift = …; static const struct dcn10_link_enc_mask le_mask = …; #define ipp_regs(id) … static const struct dcn10_ipp_registers ipp_regs[] = …; static const struct dcn10_ipp_shift ipp_shift = …; static const struct dcn10_ipp_mask ipp_mask = …; #define opp_regs(id) … static const struct dcn201_opp_registers opp_regs[] = …; static const struct dcn201_opp_shift opp_shift = …; static const struct dcn201_opp_mask opp_mask = …; #define aux_engine_regs(id) … static const struct dce110_aux_registers aux_engine_regs[] = …; #define tf_regs(id) … static const struct dcn201_dpp_registers tf_regs[] = …; static const struct dcn201_dpp_shift tf_shift = …; static const struct dcn201_dpp_mask tf_mask = …; static const struct dcn201_mpc_registers mpc_regs = …; static const struct dcn201_mpc_shift mpc_shift = …; static const struct dcn201_mpc_mask mpc_mask = …; #define tg_regs_dcn201(id) … static const struct dcn_optc_registers tg_regs[] = …; static const struct dcn_optc_shift tg_shift = …; static const struct dcn_optc_mask tg_mask = …; #define hubp_regsDCN201(id) … static const struct dcn201_hubp_registers hubp_regs[] = …; static const struct dcn201_hubp_shift hubp_shift = …; static const struct dcn201_hubp_mask hubp_mask = …; static const struct dcn_hubbub_registers hubbub_reg = …; static const struct dcn_hubbub_shift hubbub_shift = …; static const struct dcn_hubbub_mask hubbub_mask = …; static const struct dccg_registers dccg_regs = …; static const struct dccg_shift dccg_shift = …; static const struct dccg_mask dccg_mask = …; static const struct resource_caps res_cap_dnc201 = …; static const struct dc_plane_cap plane_cap = …; static const struct dc_debug_options debug_defaults_drv = …; static void dcn201_dpp_destroy(struct dpp **dpp) { … } static struct dpp *dcn201_dpp_create( struct dc_context *ctx, uint32_t inst) { … } static struct input_pixel_processor *dcn201_ipp_create( struct dc_context *ctx, uint32_t inst) { … } static struct output_pixel_processor *dcn201_opp_create( struct dc_context *ctx, uint32_t inst) { … } static struct dce_aux *dcn201_aux_engine_create(struct dc_context *ctx, uint32_t inst) { … } #define i2c_inst_regs(id) … static const struct dce_i2c_registers i2c_hw_regs[] = …; static const struct dce_i2c_shift i2c_shifts = …; static const struct dce_i2c_mask i2c_masks = …; static struct dce_i2c_hw *dcn201_i2c_hw_create(struct dc_context *ctx, uint32_t inst) { … } static struct mpc *dcn201_mpc_create(struct dc_context *ctx, uint32_t num_mpcc) { … } static struct hubbub *dcn201_hubbub_create(struct dc_context *ctx) { … } static struct timing_generator *dcn201_timing_generator_create( struct dc_context *ctx, uint32_t instance) { … } static const struct encoder_feature_support link_enc_feature = …; static struct link_encoder *dcn201_link_encoder_create( struct dc_context *ctx, const struct encoder_init_data *enc_init_data) { … } static struct clock_source *dcn201_clock_source_create( struct dc_context *ctx, struct dc_bios *bios, enum clock_source_id id, const struct dce110_clk_src_regs *regs, bool dp_clk_src) { … } static void read_dce_straps( struct dc_context *ctx, struct resource_straps *straps) { … } static struct audio *dcn201_create_audio( struct dc_context *ctx, unsigned int inst) { … } static struct stream_encoder *dcn201_stream_encoder_create( enum engine_id eng_id, struct dc_context *ctx) { … } static const struct dce_hwseq_registers hwseq_reg = …; static const struct dce_hwseq_shift hwseq_shift = …; static const struct dce_hwseq_mask hwseq_mask = …; static struct dce_hwseq *dcn201_hwseq_create( struct dc_context *ctx) { … } static const struct resource_create_funcs res_create_funcs = …; static void dcn201_clock_source_destroy(struct clock_source **clk_src) { … } static void dcn201_resource_destruct(struct dcn201_resource_pool *pool) { … } static struct hubp *dcn201_hubp_create( struct dc_context *ctx, uint32_t inst) { … } static struct pipe_ctx *dcn201_acquire_free_pipe_for_layer( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, const struct pipe_ctx *opp_head_pipe) { … } static bool dcn201_get_dcc_compression_cap(const struct dc *dc, const struct dc_dcc_surface_param *input, struct dc_surface_dcc_cap *output) { … } static void dcn201_populate_dml_writeback_from_context(struct dc *dc, struct resource_context *res_ctx, display_e2e_pipe_params_st *pipes) { … } static void dcn201_destroy_resource_pool(struct resource_pool **pool) { … } static void dcn201_link_init(struct dc_link *link) { … } static struct dc_cap_funcs cap_funcs = …; static struct resource_funcs dcn201_res_pool_funcs = …; static bool dcn201_resource_construct( uint8_t num_virtual_links, struct dc *dc, struct dcn201_resource_pool *pool) { … } struct resource_pool *dcn201_create_resource_pool( const struct dc_init_data *init_data, struct dc *dc) { … }
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