linux/drivers/gpu/drm/amd/display/dc/optc/dcn35/dcn35_optc.c

/* SPDX-License-Identifier: MIT */
/*
 * Copyright 2023 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dcn35_optc.h"

#include "dcn30/dcn30_optc.h"
#include "dcn31/dcn31_optc.h"
#include "dcn32/dcn32_optc.h"
#include "reg_helper.h"
#include "dc.h"
#include "dcn_calc_math.h"
#include "dc_dmub_srv.h"

#define REG(reg) …

#define CTX …

#undef FN
#define FN(reg_name, field_name) …

/**
 * optc35_set_odm_combine() - Enable CRTC - call ASIC Control Object to enable Timing generator.
 *
 * @optc: Output Pipe Timing Combine instance reference.
 * @opp_id: Output Plane Processor instance ID.
 * @opp_cnt: Output Plane Processor count.
 * @segment_width: Width of the segment.
 * @last_segment_width: Width of the last segment.
 *
 * Return: void.
 */
static void optc35_set_odm_combine(struct timing_generator *optc, int *opp_id, int opp_cnt,
		int segment_width, int last_segment_width)
{ … }

static bool optc35_enable_crtc(struct timing_generator *optc)
{ … }

/* disable_crtc */
static bool optc35_disable_crtc(struct timing_generator *optc)
{ … }

static void optc35_phantom_crtc_post_enable(struct timing_generator *optc)
{ … }

static bool optc35_configure_crc(struct timing_generator *optc,
				 const struct crc_params *params)
{ … }

static void optc35_setup_manual_trigger(struct timing_generator *optc)
{ … }

void optc35_set_drr(
	struct timing_generator *optc,
	const struct drr_params *params)
{ … }

static void optc35_set_long_vtotal(
	struct timing_generator *optc,
	const struct long_vtotal_params *params)
{ … }

static struct timing_generator_funcs dcn35_tg_funcs = …;

void dcn35_timing_generator_init(struct optc *optc1)
{ … }

void dcn35_timing_generator_set_fgcg(struct optc *optc1, bool enable)
{ … }