/* * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include "reg_helper.h" #include "resource.h" #include "mcif_wb.h" #include "dcn20_mmhubbub.h" #define REG(reg) … #define CTX … #undef FN #define FN(reg_name, field_name) … #define MCIF_ADDR(addr) … #define MCIF_ADDR_HIGH(addr) … /* wbif programming guide: * 1. set up wbif parameter: * unsigned long long luma_address[4]; //4 frame buffer * unsigned long long chroma_address[4]; * unsigned int luma_pitch; * unsigned int chroma_pitch; * unsigned int warmup_pitch=0x10; //256B align, the page size is 4KB when it is 0x10 * unsigned int slice_lines; //slice size * unsigned int time_per_pixel; // time per pixel, in ns * unsigned int arbitration_slice; // 0: 512 bytes 1: 1024 bytes 2: 2048 Bytes * unsigned int max_scaled_time; // used for QOS generation * unsigned int swlock=0x0; * unsigned int cli_watermark[4]; //4 group urgent watermark * unsigned int pstate_watermark[4]; //4 group pstate watermark * unsigned int sw_int_en; // Software interrupt enable, frame end and overflow * unsigned int sw_slice_int_en; // slice end interrupt enable * unsigned int sw_overrun_int_en; // overrun error interrupt enable * unsigned int vce_int_en; // VCE interrupt enable, frame end and overflow * unsigned int vce_slice_int_en; // VCE slice end interrupt enable, frame end and overflow * * 2. configure wbif register * a. call mmhubbub_config_wbif() * * 3. Enable wbif * call set_wbif_bufmgr_enable(); * * 4. wbif_dump_status(), option, for debug purpose * the bufmgr status can show the progress of write back, can be used for debug purpose */ static void mmhubbub2_config_mcif_buf(struct mcif_wb *mcif_wb, struct mcif_buf_params *params, unsigned int dest_height) { … } static void mmhubbub2_config_mcif_arb(struct mcif_wb *mcif_wb, struct mcif_arb_params *params) { … } void mmhubbub2_config_mcif_irq(struct mcif_wb *mcif_wb, struct mcif_irq_params *params) { … } void mmhubbub2_enable_mcif(struct mcif_wb *mcif_wb) { … } void mmhubbub2_disable_mcif(struct mcif_wb *mcif_wb) { … } /* set which group of pstate watermark to use and set wbif watermark change request */ /* static void mmhubbub2_wbif_watermark_change_req(struct mcif_wb *mcif_wb, unsigned int wm_set) { struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb); uint32_t change_req; REG_GET(SMU_WM_CONTROL, MCIF_WB0_WM_CHG_REQ, &change_req); change_req = (change_req == 0) ? 1 : 0; REG_UPDATE(SMU_WM_CONTROL, MCIF_WB0_WM_CHG_SEL, wm_set); REG_UPDATE(SMU_WM_CONTROL, MCIF_WB0_WM_CHG_REQ, change_req); } */ /* Set watermark change interrupt disable bit */ /* static void mmhubbub2_set_wbif_watermark_change_int_disable(struct mcif_wb *mcif_wb, unsigned int ack_int_dis) { struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb); REG_UPDATE(SMU_WM_CONTROL, MCIF_WB0_WM_CHG_ACK_INT_DIS, ack_int_dis); } */ /* Read watermark change interrupt status */ /* unsigned int mmhubbub2_get_wbif_watermark_change_int_status(struct mcif_wb *mcif_wb) { struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb); uint32_t irq_status; REG_GET(SMU_WM_CONTROL, MCIF_WB0_WM_CHG_ACK_INT_STATUS, &irq_status); return irq_status; } */ void mcifwb2_dump_frame(struct mcif_wb *mcif_wb, struct mcif_buf_params *mcif_params, enum dwb_scaler_mode out_format, unsigned int dest_width, unsigned int dest_height, struct mcif_wb_frame_dump_info *dump_info, unsigned char *luma_buffer, unsigned char *chroma_buffer, unsigned char *dest_luma_buffer, unsigned char *dest_chroma_buffer) { … } static const struct mcif_wb_funcs dcn20_mmhubbub_funcs = …; void dcn20_mmhubbub_construct(struct dcn20_mmhubbub *mcif_wb20, struct dc_context *ctx, const struct dcn20_mmhubbub_registers *mcif_wb_regs, const struct dcn20_mmhubbub_shift *mcif_wb_shift, const struct dcn20_mmhubbub_mask *mcif_wb_mask, int inst) { … }
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