linux/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_mpc.c

/*
 * Copyright 2020 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "reg_helper.h"
#include "dcn30_mpc.h"
#include "dcn30_cm_common.h"
#include "basics/conversion.h"
#include "dcn10/dcn10_cm_common.h"
#include "dc.h"

#define REG(reg) …

#define CTX …

#undef FN
#define FN(reg_name, field_name) …


#define NUM_ELEMENTS(a) …


void mpc3_mpc_init(struct mpc *mpc)
{ … }

void mpc3_mpc_init_single_inst(struct mpc *mpc, unsigned int mpcc_id)
{ … }

bool mpc3_is_dwb_idle(
	struct mpc *mpc,
	int dwb_id)
{ … }

void mpc3_set_dwb_mux(
	struct mpc *mpc,
	int dwb_id,
	int mpcc_id)
{ … }

void mpc3_disable_dwb_mux(
	struct mpc *mpc,
	int dwb_id)
{ … }

enum dc_lut_mode mpc3_get_ogam_current(struct mpc *mpc, int mpcc_id)
{ … }

void mpc3_power_on_ogam_lut(
		struct mpc *mpc, int mpcc_id,
		bool power_on)
{ … }

static void mpc3_configure_ogam_lut(
		struct mpc *mpc, int mpcc_id,
		bool is_ram_a)
{ … }

static void mpc3_ogam_get_reg_field(
		struct mpc *mpc,
		struct dcn3_xfer_func_reg *reg)
{ … }

static void mpc3_program_luta(struct mpc *mpc, int mpcc_id,
		const struct pwl_params *params)
{ … }

static void mpc3_program_lutb(struct mpc *mpc, int mpcc_id,
		const struct pwl_params *params)
{ … }


static void mpc3_program_ogam_pwl(
		struct mpc *mpc, int mpcc_id,
		const struct pwl_result_data *rgb,
		uint32_t num)
{ … }

void mpc3_set_output_gamma(
		struct mpc *mpc,
		int mpcc_id,
		const struct pwl_params *params)
{ … }

void mpc3_set_denorm(
		struct mpc *mpc,
		int opp_id,
		enum dc_color_depth output_depth)
{ … }

void mpc3_set_denorm_clamp(
		struct mpc *mpc,
		int opp_id,
		struct mpc_denorm_clamp denorm_clamp)
{ … }

static enum dc_lut_mode mpc3_get_shaper_current(struct mpc *mpc, uint32_t rmu_idx)
{ … }

static void mpc3_configure_shaper_lut(
		struct mpc *mpc,
		bool is_ram_a,
		uint32_t rmu_idx)
{ … }

static void mpc3_program_shaper_luta_settings(
		struct mpc *mpc,
		const struct pwl_params *params,
		uint32_t rmu_idx)
{ … }

static void mpc3_program_shaper_lutb_settings(
		struct mpc *mpc,
		const struct pwl_params *params,
		uint32_t rmu_idx)
{ … }


static void mpc3_program_shaper_lut(
		struct mpc *mpc,
		const struct pwl_result_data *rgb,
		uint32_t num,
		uint32_t rmu_idx)
{ … }

static void mpc3_power_on_shaper_3dlut(
		struct mpc *mpc,
		uint32_t rmu_idx,
	bool power_on)
{ … }



bool mpc3_program_shaper(
		struct mpc *mpc,
		const struct pwl_params *params,
		uint32_t rmu_idx)
{ … }

static void mpc3_set_3dlut_mode(
		struct mpc *mpc,
		enum dc_lut_mode mode,
		bool is_color_channel_12bits,
		bool is_lut_size17x17x17,
		uint32_t rmu_idx)
{ … }

static enum dc_lut_mode get3dlut_config(
			struct mpc *mpc,
			bool *is_17x17x17,
			bool *is_12bits_color_channel,
			int rmu_idx)
{ … }

static void mpc3_select_3dlut_ram(
		struct mpc *mpc,
		enum dc_lut_mode mode,
		bool is_color_channel_12bits,
		uint32_t rmu_idx)
{ … }

static void mpc3_select_3dlut_ram_mask(
		struct mpc *mpc,
		uint32_t ram_selection_mask,
		uint32_t rmu_idx)
{ … }

static void mpc3_set3dlut_ram12(
		struct mpc *mpc,
		const struct dc_rgb *lut,
		uint32_t entries,
		uint32_t rmu_idx)
{ … }

static void mpc3_set3dlut_ram10(
		struct mpc *mpc,
		const struct dc_rgb *lut,
		uint32_t entries,
		uint32_t rmu_idx)
{ … }


void mpc3_init_mpcc(struct mpcc *mpcc, int mpcc_inst)
{ … }

static void program_gamut_remap(
		struct dcn30_mpc *mpc30,
		int mpcc_id,
		const uint16_t *regval,
		int select)
{ … }

void mpc3_set_gamut_remap(
		struct mpc *mpc,
		int mpcc_id,
		const struct mpc_grph_gamut_adjustment *adjust)
{ … }

static void read_gamut_remap(struct dcn30_mpc *mpc30,
			     int mpcc_id,
			     uint16_t *regval,
			     uint32_t *select)
{ … }

void mpc3_get_gamut_remap(struct mpc *mpc,
			  int mpcc_id,
			  struct mpc_grph_gamut_adjustment *adjust)
{ … }

bool mpc3_program_3dlut(
		struct mpc *mpc,
		const struct tetrahedral_params *params,
		int rmu_idx)
{ … }

void mpc3_set_output_csc(
		struct mpc *mpc,
		int opp_id,
		const uint16_t *regval,
		enum mpc_output_csc_mode ocsc_mode)
{ … }

void mpc3_set_ocsc_default(
		struct mpc *mpc,
		int opp_id,
		enum dc_color_space color_space,
		enum mpc_output_csc_mode ocsc_mode)
{ … }

void mpc3_set_rmu_mux(
	struct mpc *mpc,
	int rmu_idx,
	int value)
{ … }

uint32_t mpc3_get_rmu_mux_status(
	struct mpc *mpc,
	int rmu_idx)
{ … }

uint32_t mpcc3_acquire_rmu(struct mpc *mpc, int mpcc_id, int rmu_idx)
{ … }

static int mpcc3_release_rmu(struct mpc *mpc, int mpcc_id)
{ … }

static void mpc3_set_mpc_mem_lp_mode(struct mpc *mpc)
{ … }

static void mpc3_read_mpcc_state(
		struct mpc *mpc,
		int mpcc_inst,
		struct mpcc_state *s)
{ … }

static const struct mpc_funcs dcn30_mpc_funcs = …;

void dcn30_mpc_construct(struct dcn30_mpc *mpc30,
	struct dc_context *ctx,
	const struct dcn30_mpc_registers *mpc_regs,
	const struct dcn30_mpc_shift *mpc_shift,
	const struct dcn30_mpc_mask *mpc_mask,
	int num_mpcc,
	int num_rmu)
{ … }