linux/drivers/gpu/drm/amd/display/dc/dcn30/dcn30_dwb_cm.c

/*
 * Copyright 2020 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "reg_helper.h"
#include "fixed31_32.h"
#include "resource.h"
#include "basics/conversion.h"
#include "dwb.h"
#include "dcn30_dwb.h"
#include "dcn30_cm_common.h"
#include "dcn10/dcn10_cm_common.h"


#define REG(reg) …

#define CTX …

#undef FN
#define FN(reg_name, field_name) …

#define TO_DCN30_DWBC(dwbc_base) …

static void dwb3_get_reg_field_ogam(struct dcn30_dwbc *dwbc30,
	struct dcn3_xfer_func_reg *reg)
{ … }

/*program dwb ogam RAM A*/
static void dwb3_program_ogam_luta_settings(
	struct dcn30_dwbc *dwbc30,
	const struct pwl_params *params)
{ … }

/*program dwb ogam RAM B*/
static void dwb3_program_ogam_lutb_settings(
	struct dcn30_dwbc *dwbc30,
	const struct pwl_params *params)
{ … }

static enum dc_lut_mode dwb3_get_ogam_current(
	struct dcn30_dwbc *dwbc30)
{ … }

static void dwb3_configure_ogam_lut(
	struct dcn30_dwbc *dwbc30,
	bool is_ram_a)
{ … }

static void dwb3_program_ogam_pwl(struct dcn30_dwbc *dwbc30,
	const struct pwl_result_data *rgb,
	uint32_t num)
{ … }

static bool dwb3_program_ogam_lut(
	struct dcn30_dwbc *dwbc30,
	const struct pwl_params *params)
{ … }

bool dwb3_ogam_set_input_transfer_func(
	struct dwbc *dwbc,
	const struct dc_transfer_func *in_transfer_func_dwb_ogam)
{ … }

static void dwb3_program_gamut_remap(
		struct dwbc *dwbc,
		const uint16_t *regval,
		enum cm_gamut_coef_format coef_format,
		enum cm_gamut_remap_select select)
{ … }

void dwb3_set_gamut_remap(
	struct dwbc *dwbc,
	const struct dc_dwb_params *params)
{ … }

void dwb3_program_hdr_mult(
	struct dwbc *dwbc,
	const struct dc_dwb_params *params)
{ … }