linux/drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hpo_dp_link_encoder.c

/*
 * Copyright 2019 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 *  and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dc_bios_types.h"
#include "dcn31_hpo_dp_link_encoder.h"
#include "reg_helper.h"
#include "stream_encoder.h"

#define DC_LOGGER …

#define REG(reg) …

#undef FN
#define FN(reg_name, field_name) …


#define CTX …

enum { … };

void dcn31_hpo_dp_link_enc_enable(
		struct hpo_dp_link_encoder *enc,
		enum dc_lane_count num_lanes)
{ … }

void dcn31_hpo_dp_link_enc_disable(
		struct hpo_dp_link_encoder *enc)
{ … }

void dcn31_hpo_dp_link_enc_set_link_test_pattern(
		struct hpo_dp_link_encoder *enc,
		struct encoder_set_dp_phy_pattern_param *tp_params)
{ … }

static void fill_stream_allocation_row_info(
		const struct link_mst_stream_allocation *stream_allocation,
		uint32_t *src,
		uint32_t *slots)
{ … }

/* programs DP VC payload allocation */
void dcn31_hpo_dp_link_enc_update_stream_allocation_table(
		struct hpo_dp_link_encoder *enc,
		const struct link_mst_stream_allocation_table *table)
{ … }

void dcn31_hpo_dp_link_enc_set_throttled_vcp_size(
		struct hpo_dp_link_encoder *enc,
		uint32_t stream_encoder_inst,
		struct fixed31_32 avg_time_slots_per_mtp)
{ … }

static bool dcn31_hpo_dp_link_enc_is_in_alt_mode(
		struct hpo_dp_link_encoder *enc)
{ … }

void dcn31_hpo_dp_link_enc_read_state(
		struct hpo_dp_link_encoder *enc,
		struct hpo_dp_link_enc_state *state)
{ … }

static enum bp_result link_transmitter_control(
	struct dcn31_hpo_dp_link_encoder *enc3,
	struct bp_transmitter_control *cntl)
{ … }

/* enables DP PHY output for 128b132b encoding */
void dcn31_hpo_dp_link_enc_enable_dp_output(
	struct hpo_dp_link_encoder *enc,
	const struct dc_link_settings *link_settings,
	enum transmitter transmitter,
	enum hpd_source_id hpd_source)
{ … }

void dcn31_hpo_dp_link_enc_disable_output(
	struct hpo_dp_link_encoder *enc,
	enum signal_type signal)
{ … }

void dcn31_hpo_dp_link_enc_set_ffe(
	struct hpo_dp_link_encoder *enc,
	const struct dc_link_settings *link_settings,
	uint8_t ffe_preset)
{ … }

static struct hpo_dp_link_encoder_funcs dcn31_hpo_dp_link_encoder_funcs = …;

void hpo_dp_link_encoder31_construct(struct dcn31_hpo_dp_link_encoder *enc31,
		struct dc_context *ctx,
		uint32_t inst,
		const struct dcn31_hpo_dp_link_encoder_registers *hpo_le_regs,
		const struct dcn31_hpo_dp_link_encoder_shift *hpo_le_shift,
		const struct dcn31_hpo_dp_link_encoder_mask *hpo_le_mask)
{ … }