linux/drivers/gpu/drm/amd/display/dc/dml2/display_mode_core.h

/*
 * Copyright 2022 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#ifndef __DISPLAY_MODE_CORE_H__
#define __DISPLAY_MODE_CORE_H__

#include "display_mode_core_structs.h"

struct display_mode_lib_st;

dml_bool_t dml_core_mode_support(struct display_mode_lib_st *mode_lib);
void dml_core_mode_support_partial(struct display_mode_lib_st *mode_lib);
void dml_core_mode_programming(struct display_mode_lib_st *mode_lib, const struct dml_clk_cfg_st *clk_cfg);

void dml_core_get_row_heights(
						dml_uint_t *dpte_row_height,
						dml_uint_t *meta_row_height,
						const struct display_mode_lib_st *mode_lib,
						dml_bool_t is_plane1,
						enum dml_source_format_class SourcePixelFormat,
						enum dml_swizzle_mode SurfaceTiling,
						enum dml_rotation_angle ScanDirection,
						dml_uint_t pitch,
						dml_uint_t GPUVMMinPageSizeKBytes);

dml_float_t dml_get_return_bw_mbps_vm_only(
									const struct soc_bounding_box_st *soc,
									dml_bool_t use_ideal_dram_bw_strobe,
									dml_bool_t HostVMEnable,
									dml_float_t DCFCLK,
									dml_float_t FabricClock,
									dml_float_t DRAMSpeed);

dml_float_t dml_get_return_bw_mbps(
							const struct soc_bounding_box_st *soc,
							dml_bool_t use_ideal_dram_bw_strobe,
							dml_bool_t HostVMEnable,
							dml_float_t DCFCLK,
							dml_float_t FabricClock,
							dml_float_t DRAMSpeed);

dml_bool_t dml_mode_support(
	struct display_mode_lib_st *mode_lib,
	dml_uint_t state_idx,
	const struct dml_display_cfg_st *display_cfg);

dml_bool_t dml_mode_programming(
	struct display_mode_lib_st *mode_lib,
	dml_uint_t state_idx,
	const struct dml_display_cfg_st *display_cfg,
	bool call_standalone);

dml_uint_t dml_mode_support_ex(
	struct dml_mode_support_ex_params_st *in_out_params);

dml_bool_t dml_get_is_phantom_pipe(struct display_mode_lib_st *mode_lib, dml_uint_t pipe_idx);

#define dml_get_per_surface_var_decl(variable, type)
#define dml_get_var_decl(var, type)

dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();

dml_get_var_decl();
dml_get_var_decl();
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dml_get_var_decl();
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dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();
dml_get_var_decl();

dml_get_per_surface_var_decl();
dml_get_per_surface_var_decl();
dml_get_per_surface_var_decl();
dml_get_per_surface_var_decl();
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dml_get_per_surface_var_decl();

#endif