/* * Copyright 2012-15 Advanced Micro Devices, Inc. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice shall be included in * all copies or substantial portions of the Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. * * Authors: AMD * */ #include "dm_services.h" #include "resource.h" #include "include/irq_service_interface.h" #include "link_encoder.h" #include "stream_encoder.h" #include "opp.h" #include "timing_generator.h" #include "transform.h" #include "dccg.h" #include "dchubbub.h" #include "dpp.h" #include "core_types.h" #include "set_mode_types.h" #include "virtual/virtual_stream_encoder.h" #include "dpcd_defs.h" #include "link_enc_cfg.h" #include "link.h" #include "clk_mgr.h" #include "dc_state_priv.h" #include "dc_stream_priv.h" #include "virtual/virtual_link_hwss.h" #include "link/hwss/link_hwss_dio.h" #include "link/hwss/link_hwss_dpia.h" #include "link/hwss/link_hwss_hpo_dp.h" #include "link/hwss/link_hwss_dio_fixed_vs_pe_retimer.h" #include "link/hwss/link_hwss_hpo_fixed_vs_pe_retimer_dp.h" #if defined(CONFIG_DRM_AMD_DC_SI) #include "dce60/dce60_resource.h" #endif #include "dce80/dce80_resource.h" #include "dce100/dce100_resource.h" #include "dce110/dce110_resource.h" #include "dce112/dce112_resource.h" #include "dce120/dce120_resource.h" #include "dcn10/dcn10_resource.h" #include "dcn20/dcn20_resource.h" #include "dcn21/dcn21_resource.h" #include "dcn201/dcn201_resource.h" #include "dcn30/dcn30_resource.h" #include "dcn301/dcn301_resource.h" #include "dcn302/dcn302_resource.h" #include "dcn303/dcn303_resource.h" #include "dcn31/dcn31_resource.h" #include "dcn314/dcn314_resource.h" #include "dcn315/dcn315_resource.h" #include "dcn316/dcn316_resource.h" #include "dcn32/dcn32_resource.h" #include "dcn321/dcn321_resource.h" #include "dcn35/dcn35_resource.h" #include "dcn351/dcn351_resource.h" #include "dcn401/dcn401_resource.h" #if defined(CONFIG_DRM_AMD_DC_FP) #include "dc_spl_translate.h" #endif #define VISUAL_CONFIRM_BASE_DEFAULT … #define VISUAL_CONFIRM_BASE_MIN … #define VISUAL_CONFIRM_BASE_MAX … /* we choose 240 because it is a common denominator of common v addressable * such as 2160, 1440, 1200, 960. So we take 1/240 portion of v addressable as * the visual confirm dpp offset height. So visual confirm height can stay * relatively the same independent from timing used. */ #define VISUAL_CONFIRM_DPP_OFFSET_DENO … #define DC_LOGGER … #define DC_LOGGER_INIT(logger) … #include "dml2/dml2_wrapper.h" #define UNABLE_TO_SPLIT … enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id) { … } struct resource_pool *dc_create_resource_pool(struct dc *dc, const struct dc_init_data *init_data, enum dce_version dc_version) { … } void dc_destroy_resource_pool(struct dc *dc) { … } static void update_num_audio( const struct resource_straps *straps, unsigned int *num_audio, struct audio_support *aud_support) { … } bool resource_construct( unsigned int num_virtual_links, struct dc *dc, struct resource_pool *pool, const struct resource_create_funcs *create_funcs) { … } static int find_matching_clock_source( const struct resource_pool *pool, struct clock_source *clock_source) { … } void resource_unreference_clock_source( struct resource_context *res_ctx, const struct resource_pool *pool, struct clock_source *clock_source) { … } void resource_reference_clock_source( struct resource_context *res_ctx, const struct resource_pool *pool, struct clock_source *clock_source) { … } int resource_get_clock_source_reference( struct resource_context *res_ctx, const struct resource_pool *pool, struct clock_source *clock_source) { … } bool resource_are_vblanks_synchronizable( struct dc_stream_state *stream1, struct dc_stream_state *stream2) { … } bool resource_are_streams_timing_synchronizable( struct dc_stream_state *stream1, struct dc_stream_state *stream2) { … } static bool is_dp_and_hdmi_sharable( struct dc_stream_state *stream1, struct dc_stream_state *stream2) { … } static bool is_sharable_clk_src( const struct pipe_ctx *pipe_with_clk_src, const struct pipe_ctx *pipe) { … } struct clock_source *resource_find_used_clk_src_for_sharing( struct resource_context *res_ctx, struct pipe_ctx *pipe_ctx) { … } static enum pixel_format convert_pixel_format_to_dalsurface( enum surface_pixel_format surface_pixel_format) { … } static inline void get_vp_scan_direction( enum dc_rotation_angle rotation, bool horizontal_mirror, bool *orthogonal_rotation, bool *flip_vert_scan_dir, bool *flip_horz_scan_dir) { … } /* * This is a preliminary vp size calculation to allow us to check taps support. * The result is completely overridden afterwards. */ static void calculate_viewport_size(struct pipe_ctx *pipe_ctx) { … } static struct rect intersect_rec(const struct rect *r0, const struct rect *r1) { … } static struct rect shift_rec(const struct rect *rec_in, int x, int y) { … } static struct rect calculate_plane_rec_in_timing_active( struct pipe_ctx *pipe_ctx, const struct rect *rec_in) { … } static struct rect calculate_mpc_slice_in_timing_active( struct pipe_ctx *pipe_ctx, struct rect *plane_clip_rec) { … } static void calculate_adjust_recout_for_visual_confirm(struct pipe_ctx *pipe_ctx, int *base_offset, int *dpp_offset) { … } static void adjust_recout_for_visual_confirm(struct rect *recout, struct pipe_ctx *pipe_ctx) { … } /* * The function maps a plane clip from Stream Source Space to ODM Slice Space * and calculates the rec of the overlapping area of MPC slice of the plane * clip, ODM slice associated with the pipe context and stream destination rec. */ static void calculate_recout(struct pipe_ctx *pipe_ctx) { … } static void calculate_scaling_ratios(struct pipe_ctx *pipe_ctx) { … } /* * We completely calculate vp offset, size and inits here based entirely on scaling * ratios and recout for pixel perfect pipe combine. */ static void calculate_init_and_vp( bool flip_scan_dir, int recout_offset_within_recout_full, int recout_size, int src_size, int taps, struct fixed31_32 ratio, struct fixed31_32 *init, int *vp_offset, int *vp_size) { … } static void calculate_inits_and_viewports(struct pipe_ctx *pipe_ctx) { … } static bool is_subvp_high_refresh_candidate(struct dc_stream_state *stream) { … } static enum controller_dp_test_pattern convert_dp_to_controller_test_pattern( enum dp_test_pattern test_pattern) { … } static enum controller_dp_color_space convert_dp_to_controller_color_space( enum dp_test_pattern_color_space color_space) { … } void resource_build_test_pattern_params(struct resource_context *res_ctx, struct pipe_ctx *otg_master) { … } bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) { … } enum dc_status resource_build_scaling_params_for_context( const struct dc *dc, struct dc_state *context) { … } struct pipe_ctx *resource_find_free_secondary_pipe_legacy( struct resource_context *res_ctx, const struct resource_pool *pool, const struct pipe_ctx *primary_pipe) { … } int resource_find_free_pipe_used_as_sec_opp_head_by_cur_otg_master( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct pipe_ctx *cur_otg_master) { … } int resource_find_free_pipe_used_in_cur_mpc_blending_tree( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct pipe_ctx *cur_opp_head) { … } int recource_find_free_pipe_not_used_in_cur_res_ctx( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { … } int recource_find_free_pipe_used_as_otg_master_in_cur_res_ctx( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { … } int resource_find_free_pipe_used_as_cur_sec_dpp( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { … } int resource_find_free_pipe_used_as_cur_sec_dpp_in_mpcc_combine( const struct resource_context *cur_res_ctx, struct resource_context *new_res_ctx, const struct resource_pool *pool) { … } int resource_find_any_free_pipe(struct resource_context *new_res_ctx, const struct resource_pool *pool) { … } bool resource_is_pipe_type(const struct pipe_ctx *pipe_ctx, enum pipe_type type) { … } struct pipe_ctx *resource_get_otg_master_for_stream( struct resource_context *res_ctx, const struct dc_stream_state *stream) { … } int resource_get_opp_heads_for_otg_master(const struct pipe_ctx *otg_master, struct resource_context *res_ctx, struct pipe_ctx *opp_heads[MAX_PIPES]) { … } int resource_get_dpp_pipes_for_opp_head(const struct pipe_ctx *opp_head, struct resource_context *res_ctx, struct pipe_ctx *dpp_pipes[MAX_PIPES]) { … } int resource_get_dpp_pipes_for_plane(const struct dc_plane_state *plane, struct resource_context *res_ctx, struct pipe_ctx *dpp_pipes[MAX_PIPES]) { … } struct pipe_ctx *resource_get_otg_master(const struct pipe_ctx *pipe_ctx) { … } struct pipe_ctx *resource_get_opp_head(const struct pipe_ctx *pipe_ctx) { … } struct pipe_ctx *resource_get_primary_dpp_pipe(const struct pipe_ctx *dpp_pipe) { … } int resource_get_mpc_slice_index(const struct pipe_ctx *pipe_ctx) { … } int resource_get_mpc_slice_count(const struct pipe_ctx *pipe) { … } int resource_get_odm_slice_count(const struct pipe_ctx *pipe) { … } int resource_get_odm_slice_index(const struct pipe_ctx *pipe_ctx) { … } int resource_get_odm_slice_dst_width(struct pipe_ctx *otg_master, bool is_last_segment) { … } struct rect resource_get_odm_slice_dst_rect(struct pipe_ctx *pipe_ctx) { … } struct rect resource_get_odm_slice_src_rect(struct pipe_ctx *pipe_ctx) { … } bool resource_is_pipe_topology_changed(const struct dc_state *state_a, const struct dc_state *state_b) { … } bool resource_is_odm_topology_changed(const struct pipe_ctx *otg_master_a, const struct pipe_ctx *otg_master_b) { … } /* * Sample log: * pipe topology update * ________________________ * | plane0 slice0 stream0| * |DPP0----OPP0----OTG0----| <--- case 0 (OTG master pipe with plane) * | plane1 | | | * |DPP1----| | | <--- case 5 (DPP pipe not in last slice) * | plane0 slice1 | | * |DPP2----OPP2----| | <--- case 2 (OPP head pipe with plane) * | plane1 | | * |DPP3----| | <--- case 4 (DPP pipe in last slice) * | slice0 stream1| * |DPG4----OPP4----OTG4----| <--- case 1 (OTG master pipe without plane) * | slice1 | | * |DPG5----OPP5----| | <--- case 3 (OPP head pipe without plane) * |________________________| */ static void resource_log_pipe(struct dc *dc, struct pipe_ctx *pipe, int stream_idx, int slice_idx, int plane_idx, int slice_count, bool is_primary) { … } static void resource_log_pipe_for_stream(struct dc *dc, struct dc_state *state, struct pipe_ctx *otg_master, int stream_idx) { … } static int resource_stream_to_stream_idx(struct dc_state *state, struct dc_stream_state *stream) { … } void resource_log_pipe_topology_update(struct dc *dc, struct dc_state *state) { … } static struct pipe_ctx *get_tail_pipe( struct pipe_ctx *head_pipe) { … } static struct pipe_ctx *get_last_opp_head( struct pipe_ctx *opp_head) { … } static struct pipe_ctx *get_last_dpp_pipe_in_mpcc_combine( struct pipe_ctx *dpp_pipe) { … } static bool update_pipe_params_after_odm_slice_count_change( struct pipe_ctx *otg_master, struct dc_state *context, const struct resource_pool *pool) { … } static bool update_pipe_params_after_mpc_slice_count_change( const struct dc_plane_state *plane, struct dc_state *context, const struct resource_pool *pool) { … } static int acquire_first_split_pipe( struct resource_context *res_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) { … } static void update_stream_engine_usage( struct resource_context *res_ctx, const struct resource_pool *pool, struct stream_encoder *stream_enc, bool acquired) { … } static void update_hpo_dp_stream_engine_usage( struct resource_context *res_ctx, const struct resource_pool *pool, struct hpo_dp_stream_encoder *hpo_dp_stream_enc, bool acquired) { … } static inline int find_acquired_hpo_dp_link_enc_for_link( const struct resource_context *res_ctx, const struct dc_link *link) { … } static inline int find_free_hpo_dp_link_enc(const struct resource_context *res_ctx, const struct resource_pool *pool) { … } static inline void acquire_hpo_dp_link_enc( struct resource_context *res_ctx, unsigned int link_index, int enc_index) { … } static inline void retain_hpo_dp_link_enc( struct resource_context *res_ctx, int enc_index) { … } static inline void release_hpo_dp_link_enc( struct resource_context *res_ctx, int enc_index) { … } static bool add_hpo_dp_link_enc_to_ctx(struct resource_context *res_ctx, const struct resource_pool *pool, struct pipe_ctx *pipe_ctx, struct dc_stream_state *stream) { … } static void remove_hpo_dp_link_enc_from_ctx(struct resource_context *res_ctx, struct pipe_ctx *pipe_ctx, struct dc_stream_state *stream) { … } static int get_num_of_free_pipes(const struct resource_pool *pool, const struct dc_state *context) { … } enum dc_status resource_add_otg_master_for_stream_output(struct dc_state *new_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) { … } void resource_remove_otg_master_for_stream_output(struct dc_state *context, const struct resource_pool *pool, struct dc_stream_state *stream) { … } /* For each OPP head of an OTG master, add top plane at plane index 0. * * In the following example, the stream has 2 ODM slices without a top plane. * By adding a plane 0 to OPP heads, we are configuring our hardware to render * plane 0 by using each OPP head's DPP. * * Inter-pipe Relation (Before Adding Plane) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | | slice 0 | | * | 0 | |blank ----ODM----------- | * | | | slice 1 | | | * | 1 | |blank ---- | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Adding Plane) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------------------ODM----------- | * | | plane 0 | slice 1 | | | * | 1 | ------------------------- | | * |________|_______________|___________|_____________| */ static bool add_plane_to_opp_head_pipes(struct pipe_ctx *otg_master_pipe, struct dc_plane_state *plane_state, struct dc_state *context) { … } /* For each OPP head of an OTG master, acquire a secondary DPP pipe and add * the plane. So the plane is added to all ODM slices associated with the OTG * master pipe in the bottom layer. * * In the following example, the stream has 2 ODM slices and a top plane 0. * By acquiring secondary DPP pipes and adding a plane 1, we are configuring our * hardware to render the plane 1 by acquiring a new pipe for each ODM slice and * render plane 1 using new pipes' DPP in the Z axis below plane 0. * * Inter-pipe Relation (Before Adding Plane) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------------------ODM----------- | * | | plane 0 | slice 1 | | | * | 1 | ------------------------- | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Acquiring and Adding Plane) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------MPC---------ODM----------- | * | | plane 1 | | | | | * | 2 | ------------- | | | | * | | plane 0 | slice 1 | | | * | 1 | -------------MPC--------- | | * | | plane 1 | | | | * | 3 | ------------- | | | * |________|_______________|___________|_____________| */ static bool acquire_secondary_dpp_pipes_and_add_plane( struct pipe_ctx *otg_master_pipe, struct dc_plane_state *plane_state, struct dc_state *new_ctx, struct dc_state *cur_ctx, struct resource_pool *pool) { … } bool resource_append_dpp_pipes_for_plane_composition( struct dc_state *new_ctx, struct dc_state *cur_ctx, struct resource_pool *pool, struct pipe_ctx *otg_master_pipe, struct dc_plane_state *plane_state) { … } void resource_remove_dpp_pipes_for_plane_composition( struct dc_state *context, const struct resource_pool *pool, const struct dc_plane_state *plane_state) { … } /* * Increase ODM slice count by 1 by acquiring pipes and adding a new ODM slice * at the last index. * return - true if a new ODM slice is added and required pipes are acquired. * false if new_ctx is no longer a valid state after new ODM slice is added. * * This is achieved by duplicating MPC blending tree from previous ODM slice. * In the following example, we have a single MPC tree and 1 ODM slice 0. We * want to add a new odm slice by duplicating the MPC blending tree and add * ODM slice 1. * * Inter-pipe Relation (Before Acquiring and Adding ODM Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------MPC---------ODM----------- | * | | plane 1 | | | | * | 1 | ------------- | | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Acquiring and Adding ODM Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------MPC---------ODM----------- | * | | plane 1 | | | | | * | 1 | ------------- | | | | * | | plane 0 | slice 1 | | | * | 2 | -------------MPC--------- | | * | | plane 1 | | | | * | 3 | ------------- | | | * |________|_______________|___________|_____________| */ static bool acquire_pipes_and_add_odm_slice( struct pipe_ctx *otg_master_pipe, struct dc_state *new_ctx, const struct dc_state *cur_ctx, const struct resource_pool *pool) { … } /* * Decrease ODM slice count by 1 by releasing pipes and removing the ODM slice * at the last index. * return - true if the last ODM slice is removed and related pipes are * released. false if there is no removable ODM slice. * * In the following example, we have 2 MPC trees and ODM slice 0 and slice 1. * We want to remove the last ODM i.e slice 1. We are releasing secondary DPP * pipe 3 and OPP head pipe 2. * * Inter-pipe Relation (Before Releasing and Removing ODM Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------MPC---------ODM----------- | * | | plane 1 | | | | | * | 1 | ------------- | | | | * | | plane 0 | slice 1 | | | * | 2 | -------------MPC--------- | | * | | plane 1 | | | | * | 3 | ------------- | | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Releasing and Removing ODM Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | slice 0 | | * | 0 | -------------MPC---------ODM----------- | * | | plane 1 | | | | * | 1 | ------------- | | | * |________|_______________|___________|_____________| */ static bool release_pipes_and_remove_odm_slice( struct pipe_ctx *otg_master_pipe, struct dc_state *context, const struct resource_pool *pool) { … } /* * Increase MPC slice count by 1 by acquiring a new DPP pipe and add it as the * last MPC slice of the plane associated with dpp_pipe. * * return - true if a new MPC slice is added and required pipes are acquired. * false if new_ctx is no longer a valid state after new MPC slice is added. * * In the following example, we add a new MPC slice for plane 0 into the * new_ctx. To do so we pass pipe 0 as dpp_pipe. The function acquires a new DPP * pipe 2 for plane 0 as the bottom most pipe for plane 0. * * Inter-pipe Relation (Before Acquiring and Adding MPC Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | | | * | 0 | -------------MPC----------------------- | * | | plane 1 | | | | * | 1 | ------------- | | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Acquiring and Adding MPC Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | | | * | 0 | -------------MPC----------------------- | * | | plane 0 | | | | * | 2 | ------------- | | | * | | plane 1 | | | | * | 1 | ------------- | | | * |________|_______________|___________|_____________| */ static bool acquire_dpp_pipe_and_add_mpc_slice( struct pipe_ctx *dpp_pipe, struct dc_state *new_ctx, const struct dc_state *cur_ctx, const struct resource_pool *pool) { … } /* * Reduce MPC slice count by 1 by releasing the bottom DPP pipe in MPCC combine * with dpp_pipe and removing last MPC slice of the plane associated with * dpp_pipe. * * return - true if the last MPC slice of the plane associated with dpp_pipe is * removed and last DPP pipe in MPCC combine with dpp_pipe is released. * false if there is no removable MPC slice. * * In the following example, we remove an MPC slice for plane 0 from the * context. To do so we pass pipe 0 as dpp_pipe. The function releases pipe 1 as * it is the last pipe for plane 0. * * Inter-pipe Relation (Before Releasing and Removing MPC Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | | | * | 0 | -------------MPC----------------------- | * | | plane 0 | | | | * | 1 | ------------- | | | * | | plane 1 | | | | * | 2 | ------------- | | | * |________|_______________|___________|_____________| * * Inter-pipe Relation (After Releasing and Removing MPC Slice) * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | plane 0 | | | * | 0 | -------------MPC----------------------- | * | | plane 1 | | | | * | 2 | ------------- | | | * |________|_______________|___________|_____________| */ static bool release_dpp_pipe_and_remove_mpc_slice( struct pipe_ctx *dpp_pipe, struct dc_state *context, const struct resource_pool *pool) { … } bool resource_update_pipes_for_stream_with_slice_count( struct dc_state *new_ctx, const struct dc_state *cur_ctx, const struct resource_pool *pool, const struct dc_stream_state *stream, int new_slice_count) { … } bool resource_update_pipes_for_plane_with_slice_count( struct dc_state *new_ctx, const struct dc_state *cur_ctx, const struct resource_pool *pool, const struct dc_plane_state *plane, int new_slice_count) { … } bool dc_is_timing_changed(struct dc_stream_state *cur_stream, struct dc_stream_state *new_stream) { … } static bool are_stream_backends_same( struct dc_stream_state *stream_a, struct dc_stream_state *stream_b) { … } /* * dc_is_stream_unchanged() - Compare two stream states for equivalence. * * Checks if there a difference between the two states * that would require a mode change. * * Does not compare cursor position or attributes. */ bool dc_is_stream_unchanged( struct dc_stream_state *old_stream, struct dc_stream_state *stream) { … } /* * dc_is_stream_scaling_unchanged() - Compare scaling rectangles of two streams. */ bool dc_is_stream_scaling_unchanged(struct dc_stream_state *old_stream, struct dc_stream_state *stream) { … } /* TODO: release audio object */ void update_audio_usage( struct resource_context *res_ctx, const struct resource_pool *pool, struct audio *audio, bool acquired) { … } static struct hpo_dp_stream_encoder *find_first_free_match_hpo_dp_stream_enc_for_link( struct resource_context *res_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) { … } static struct audio *find_first_free_audio( struct resource_context *res_ctx, const struct resource_pool *pool, enum engine_id id, enum dce_version dc_version) { … } static struct dc_stream_state *find_pll_sharable_stream( struct dc_stream_state *stream_needs_pll, struct dc_state *context) { … } static int get_norm_pix_clk(const struct dc_crtc_timing *timing) { … } static void calculate_phy_pix_clks(struct dc_stream_state *stream) { … } static int acquire_resource_from_hw_enabled_state( struct resource_context *res_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) { … } static void mark_seamless_boot_stream( const struct dc *dc, struct dc_stream_state *stream) { … } /* * Acquire a pipe as OTG master and assign to the stream in new dc context. * return - true if OTG master pipe is acquired and new dc context is updated. * false if it fails to acquire an OTG master pipe for this stream. * * In the example below, we acquired pipe 0 as OTG master pipe for the stream. * After the function its Inter-pipe Relation is represented by the diagram * below. * * Inter-pipe Relation * __________________________________________________ * |PIPE IDX| DPP PIPES | OPP HEADS | OTG MASTER | * | | | | | * | 0 | |blank ------------------ | * |________|_______________|___________|_____________| */ static bool acquire_otg_master_pipe_for_stream( const struct dc_state *cur_ctx, struct dc_state *new_ctx, const struct resource_pool *pool, struct dc_stream_state *stream) { … } enum dc_status resource_map_pool_resources( const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) { … } bool dc_resource_is_dsc_encoding_supported(const struct dc *dc) { … } static bool planes_changed_for_existing_stream(struct dc_state *context, struct dc_stream_state *stream, const struct dc_validation_set set[], int set_count) { … } static bool add_all_planes_for_stream( const struct dc *dc, struct dc_stream_state *stream, const struct dc_validation_set set[], int set_count, struct dc_state *state) { … } /** * dc_validate_with_context - Validate and update the potential new stream in the context object * * @dc: Used to get the current state status * @set: An array of dc_validation_set with all the current streams reference * @set_count: Total of streams * @context: New context * @fast_validate: Enable or disable fast validation * * This function updates the potential new stream in the context object. It * creates multiple lists for the add, remove, and unchanged streams. In * particular, if the unchanged streams have a plane that changed, it is * necessary to remove all planes from the unchanged streams. In summary, this * function is responsible for validating the new context. * * Return: * In case of success, return DC_OK (1), otherwise, return a DC error. */ enum dc_status dc_validate_with_context(struct dc *dc, const struct dc_validation_set set[], int set_count, struct dc_state *context, bool fast_validate) { … } /** * dc_validate_global_state() - Determine if hardware can support a given state * * @dc: dc struct for this driver * @new_ctx: state to be validated * @fast_validate: set to true if only yes/no to support matters * * Checks hardware resource availability and bandwidth requirement. * * Return: * DC_OK if the result can be programmed. Otherwise, an error code. */ enum dc_status dc_validate_global_state( struct dc *dc, struct dc_state *new_ctx, bool fast_validate) { … } static void patch_gamut_packet_checksum( struct dc_info_packet *gamut_packet) { … } static void set_avi_info_frame( struct dc_info_packet *info_packet, struct pipe_ctx *pipe_ctx) { … } static void set_vendor_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } static void set_spd_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } static void set_hdr_static_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } static void set_vsc_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } static void set_hfvs_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } static void adaptive_sync_override_dp_info_packets_sdp_line_num( const struct dc_crtc_timing *timing, struct enc_sdp_line_num *sdp_line_num, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param) { … } static void set_adaptive_sync_info_packet( struct dc_info_packet *info_packet, const struct dc_stream_state *stream, struct encoder_info_frame *info_frame, struct _vcs_dpi_display_pipe_dest_params_st *pipe_dlg_param) { … } static void set_vtem_info_packet( struct dc_info_packet *info_packet, struct dc_stream_state *stream) { … } struct clock_source *dc_resource_find_first_free_pll( struct resource_context *res_ctx, const struct resource_pool *pool) { … } void resource_build_info_frame(struct pipe_ctx *pipe_ctx) { … } enum dc_status resource_map_clock_resources( const struct dc *dc, struct dc_state *context, struct dc_stream_state *stream) { … } /* * Note: We need to disable output if clock sources change, * since bios does optimization and doesn't apply if changing * PHY when not already disabled. */ bool pipe_need_reprogram( struct pipe_ctx *pipe_ctx_old, struct pipe_ctx *pipe_ctx) { … } void resource_build_bit_depth_reduction_params(struct dc_stream_state *stream, struct bit_depth_reduction_params *fmt_bit_depth) { … } enum dc_status dc_validate_stream(struct dc *dc, struct dc_stream_state *stream) { … } enum dc_status dc_validate_plane(struct dc *dc, const struct dc_plane_state *plane_state) { … } unsigned int resource_pixel_format_to_bpp(enum surface_pixel_format format) { … } static unsigned int get_max_audio_sample_rate(struct audio_mode *modes) { … } void get_audio_check(struct audio_info *aud_modes, struct audio_check *audio_chk) { … } static struct hpo_dp_link_encoder *get_temp_hpo_dp_link_enc( const struct resource_context *res_ctx, const struct resource_pool *const pool, const struct dc_link *link) { … } bool get_temp_dp_link_res(struct dc_link *link, struct link_resource *link_res, struct dc_link_settings *link_settings) { … } void reset_syncd_pipes_from_disabled_pipes(struct dc *dc, struct dc_state *context) { … } void check_syncd_pipes_for_disabled_master_pipe(struct dc *dc, struct dc_state *context, uint8_t disabled_master_pipe_idx) { … } void reset_sync_context_for_pipe(const struct dc *dc, struct dc_state *context, uint8_t pipe_idx) { … } uint8_t resource_transmitter_to_phy_idx(const struct dc *dc, enum transmitter transmitter) { … } const struct link_hwss *get_link_hwss(const struct dc_link *link, const struct link_resource *link_res) { … } bool is_h_timing_divisible_by_2(struct dc_stream_state *stream) { … } /* This interface is deprecated for new DCNs. It is replaced by the following * new interfaces. These two interfaces encapsulate pipe selection priority * with DCN specific minimum hardware transition optimization algorithm. With * the new interfaces caller no longer needs to know the implementation detail * of a pipe topology. * * resource_update_pipes_with_odm_slice_count * resource_update_pipes_with_mpc_slice_count * */ bool dc_resource_acquire_secondary_pipe_for_mpc_odm_legacy( const struct dc *dc, struct dc_state *state, struct pipe_ctx *pri_pipe, struct pipe_ctx *sec_pipe, bool odm) { … } enum dc_status update_dp_encoder_resources_for_test_harness(const struct dc *dc, struct dc_state *context, struct pipe_ctx *pipe_ctx) { … } bool check_subvp_sw_cursor_fallback_req(const struct dc *dc, struct dc_stream_state *stream) { … } struct dscl_prog_data *resource_get_dscl_prog_data(struct pipe_ctx *pipe_ctx) { … } void resource_init_common_dml2_callbacks(struct dc *dc, struct dml2_configuration_options *dml2_options) { … }
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