linux/drivers/irqchip/irq-jcore-aic.c

/*
 * J-Core SoC AIC driver
 *
 * Copyright (C) 2015-2016 Smart Energy Instruments, Inc.
 *
 * This file is subject to the terms and conditions of the GNU General Public
 * License.  See the file "COPYING" in the main directory of this archive
 * for more details.
 */

#include <linux/irq.h>
#include <linux/io.h>
#include <linux/irqchip.h>
#include <linux/irqdomain.h>
#include <linux/cpu.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>

#define JCORE_AIC_MAX_HWIRQ
#define JCORE_AIC1_MIN_HWIRQ
#define JCORE_AIC2_MIN_HWIRQ

#define JCORE_AIC1_INTPRI_REG

static struct irq_chip jcore_aic;

/*
 * The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do
 * not distinguish or use distinct irq number ranges for per-cpu event
 * interrupts (timer, IPI). Since information to determine whether a
 * particular irq number should be treated as per-cpu is not available
 * at mapping time, we use a wrapper handler function which chooses
 * the right handler at runtime based on whether IRQF_PERCPU was used
 * when requesting the irq.
 */

static void handle_jcore_irq(struct irq_desc *desc)
{}

static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,
				   irq_hw_number_t hwirq)
{}

static const struct irq_domain_ops jcore_aic_irqdomain_ops =;

static void noop(struct irq_data *data)
{}

static int __init aic_irq_of_init(struct device_node *node,
				  struct device_node *parent)
{}

IRQCHIP_DECLARE(jcore_aic2, "jcore,aic2", aic_irq_of_init);
IRQCHIP_DECLARE(jcore_aic1, "jcore,aic1", aic_irq_of_init);