// SPDX-License-Identifier: GPL-2.0-only /* * PRU-ICSS INTC IRQChip driver for various TI SoCs * * Copyright (C) 2016-2020 Texas Instruments Incorporated - http://www.ti.com/ * * Author(s): * Andrew F. Davis <[email protected]> * Suman Anna <[email protected]> * Grzegorz Jaszczyk <[email protected]> for Texas Instruments * * Copyright (C) 2019 David Lechner <[email protected]> */ #include <linux/interrupt.h> #include <linux/irq.h> #include <linux/irqchip/chained_irq.h> #include <linux/irqdomain.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> /* * Number of host interrupts reaching the main MPU sub-system. Note that this * is not the same as the total number of host interrupts supported by the PRUSS * INTC instance */ #define MAX_NUM_HOST_IRQS … /* minimum starting host interrupt number for MPU */ #define FIRST_PRU_HOST_INT … /* PRU_ICSS_INTC registers */ #define PRU_INTC_REVID … #define PRU_INTC_CR … #define PRU_INTC_GER … #define PRU_INTC_GNLR … #define PRU_INTC_SISR … #define PRU_INTC_SICR … #define PRU_INTC_EISR … #define PRU_INTC_EICR … #define PRU_INTC_HIEISR … #define PRU_INTC_HIDISR … #define PRU_INTC_GPIR … #define PRU_INTC_SRSR(x) … #define PRU_INTC_SECR(x) … #define PRU_INTC_ESR(x) … #define PRU_INTC_ECR(x) … #define PRU_INTC_CMR(x) … #define PRU_INTC_HMR(x) … #define PRU_INTC_HIPIR(x) … #define PRU_INTC_SIPR(x) … #define PRU_INTC_SITR(x) … #define PRU_INTC_HINLR(x) … #define PRU_INTC_HIER … /* CMR register bit-field macros */ #define CMR_EVT_MAP_MASK … #define CMR_EVT_MAP_BITS … #define CMR_EVT_PER_REG … /* HMR register bit-field macros */ #define HMR_CH_MAP_MASK … #define HMR_CH_MAP_BITS … #define HMR_CH_PER_REG … /* HIPIR register bit-fields */ #define INTC_HIPIR_NONE_HINT … #define MAX_PRU_SYS_EVENTS … #define MAX_PRU_CHANNELS … /** * struct pruss_intc_map_record - keeps track of actual mapping state * @value: The currently mapped value (channel or host) * @ref_count: Keeps track of number of current users of this resource */ struct pruss_intc_map_record { … }; /** * struct pruss_intc_match_data - match data to handle SoC variations * @num_system_events: number of input system events handled by the PRUSS INTC * @num_host_events: number of host events (which is equal to number of * channels) supported by the PRUSS INTC */ struct pruss_intc_match_data { … }; /** * struct pruss_intc - PRUSS interrupt controller structure * @event_channel: current state of system event to channel mappings * @channel_host: current state of channel to host mappings * @irqs: kernel irq numbers corresponding to PRUSS host interrupts * @base: base virtual address of INTC register space * @domain: irq domain for this interrupt controller * @soc_config: cached PRUSS INTC IP configuration data * @dev: PRUSS INTC device pointer * @lock: mutex to serialize interrupts mapping */ struct pruss_intc { … }; /** * struct pruss_host_irq_data - PRUSS host irq data structure * @intc: PRUSS interrupt controller pointer * @host_irq: host irq number */ struct pruss_host_irq_data { … }; static inline u32 pruss_intc_read_reg(struct pruss_intc *intc, unsigned int reg) { … } static inline void pruss_intc_write_reg(struct pruss_intc *intc, unsigned int reg, u32 val) { … } static void pruss_intc_update_cmr(struct pruss_intc *intc, unsigned int evt, u8 ch) { … } static void pruss_intc_update_hmr(struct pruss_intc *intc, u8 ch, u8 host) { … } /** * pruss_intc_map() - configure the PRUSS INTC * @intc: PRUSS interrupt controller pointer * @hwirq: the system event number * * Configures the PRUSS INTC with the provided configuration from the one parsed * in the xlate function. */ static void pruss_intc_map(struct pruss_intc *intc, unsigned long hwirq) { … } /** * pruss_intc_unmap() - unconfigure the PRUSS INTC * @intc: PRUSS interrupt controller pointer * @hwirq: the system event number * * Undo whatever was done in pruss_intc_map() for a PRU core. * Mappings are reference counted, so resources are only disabled when there * are no longer any users. */ static void pruss_intc_unmap(struct pruss_intc *intc, unsigned long hwirq) { … } static void pruss_intc_init(struct pruss_intc *intc) { … } static void pruss_intc_irq_ack(struct irq_data *data) { … } static void pruss_intc_irq_mask(struct irq_data *data) { … } static void pruss_intc_irq_unmask(struct irq_data *data) { … } static int pruss_intc_irq_reqres(struct irq_data *data) { … } static void pruss_intc_irq_relres(struct irq_data *data) { … } static int pruss_intc_irq_get_irqchip_state(struct irq_data *data, enum irqchip_irq_state which, bool *state) { … } static int pruss_intc_irq_set_irqchip_state(struct irq_data *data, enum irqchip_irq_state which, bool state) { … } static struct irq_chip pruss_irqchip = …; static int pruss_intc_validate_mapping(struct pruss_intc *intc, int event, int channel, int host) { … } static int pruss_intc_irq_domain_xlate(struct irq_domain *d, struct device_node *node, const u32 *intspec, unsigned int intsize, unsigned long *out_hwirq, unsigned int *out_type) { … } static int pruss_intc_irq_domain_map(struct irq_domain *d, unsigned int virq, irq_hw_number_t hw) { … } static void pruss_intc_irq_domain_unmap(struct irq_domain *d, unsigned int virq) { … } static const struct irq_domain_ops pruss_intc_irq_domain_ops = …; static void pruss_intc_irq_handler(struct irq_desc *desc) { … } static const char * const irq_names[MAX_NUM_HOST_IRQS] = …; static int pruss_intc_probe(struct platform_device *pdev) { … } static void pruss_intc_remove(struct platform_device *pdev) { … } static const struct pruss_intc_match_data pruss_intc_data = …; static const struct pruss_intc_match_data icssg_intc_data = …; static const struct of_device_id pruss_intc_of_match[] = …; MODULE_DEVICE_TABLE(of, pruss_intc_of_match); static struct platform_driver pruss_intc_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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