linux/drivers/irqchip/irq-mchp-eic.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Microchip External Interrupt Controller driver
 *
 * Copyright (C) 2021 Microchip Technology Inc. and its subsidiaries
 *
 * Author: Claudiu Beznea <[email protected]>
 */
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interrupt.h>
#include <linux/irqchip.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/syscore_ops.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#define MCHP_EIC_GFCS …
#define MCHP_EIC_SCFG(x) …
#define MCHP_EIC_SCFG_EN …
#define MCHP_EIC_SCFG_LVL …
#define MCHP_EIC_SCFG_POL …

#define MCHP_EIC_NIRQ …

/*
 * struct mchp_eic - EIC private data structure
 * @base: base address
 * @clk: peripheral clock
 * @domain: irq domain
 * @irqs: irqs b/w eic and gic
 * @scfg: backup for scfg registers (necessary for backup and self-refresh mode)
 * @wakeup_source: wakeup source mask
 */
struct mchp_eic { … };

static struct mchp_eic *eic;

static void mchp_eic_irq_mask(struct irq_data *d)
{ … }

static void mchp_eic_irq_unmask(struct irq_data *d)
{ … }

static int mchp_eic_irq_set_type(struct irq_data *d, unsigned int type)
{ … }

static int mchp_eic_irq_set_wake(struct irq_data *d, unsigned int on)
{ … }

static int mchp_eic_irq_suspend(void)
{ … }

static void mchp_eic_irq_resume(void)
{ … }

static struct syscore_ops mchp_eic_syscore_ops = …;

static struct irq_chip mchp_eic_chip = …;

static int mchp_eic_domain_alloc(struct irq_domain *domain, unsigned int virq,
				 unsigned int nr_irqs, void *data)
{ … }

static const struct irq_domain_ops mchp_eic_domain_ops = …;

static int mchp_eic_init(struct device_node *node, struct device_node *parent)
{ … }

IRQCHIP_PLATFORM_DRIVER_BEGIN(mchp_eic)
IRQCHIP_MATCH("microchip,sama7g5-eic", mchp_eic_init)
IRQCHIP_PLATFORM_DRIVER_END(mchp_eic)

MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;