#ifndef _MHI_INT_H
#define _MHI_INT_H
#include "../common.h"
extern struct bus_type mhi_bus_type;
#define MHI_SOC_RESET_REQ_OFFSET …
#define MHI_SOC_RESET_REQ …
struct mhi_ctxt { … };
struct bhi_vec_entry { … };
enum mhi_ch_state_type { … };
#define MHI_CH_STATE_TYPE_LIST …
extern const char * const mhi_ch_state_type_str[MHI_CH_STATE_TYPE_MAX];
#define TO_CH_STATE_TYPE_STR(state) …
#define MHI_INVALID_BRSTMODE(mode) …
#define MHI_EE_LIST …
extern const char * const mhi_ee_str[MHI_EE_MAX];
#define TO_MHI_EXEC_STR(ee) …
#define MHI_IN_PBL(ee) …
#define MHI_POWER_UP_CAPABLE(ee) …
#define MHI_FW_LOAD_CAPABLE(ee) …
#define MHI_IN_MISSION_MODE(ee) …
enum dev_st_transition { … };
#define DEV_ST_TRANSITION_LIST …
extern const char * const dev_state_tran_str[DEV_ST_TRANSITION_MAX];
#define TO_DEV_STATE_TRANS_STR(state) …
enum mhi_pm_state { … };
#define MHI_PM_STATE_LIST …
#define MHI_PM_DISABLE …
#define MHI_PM_POR …
#define MHI_PM_M0 …
#define MHI_PM_M2 …
#define MHI_PM_M3_ENTER …
#define MHI_PM_M3 …
#define MHI_PM_M3_EXIT …
#define MHI_PM_FW_DL_ERR …
#define MHI_PM_SYS_ERR_DETECT …
#define MHI_PM_SYS_ERR_PROCESS …
#define MHI_PM_SYS_ERR_FAIL …
#define MHI_PM_SHUTDOWN_PROCESS …
#define MHI_PM_LD_ERR_FATAL_DETECT …
#define MHI_REG_ACCESS_VALID(pm_state) …
#define MHI_PM_IN_ERROR_STATE(pm_state) …
#define MHI_PM_IN_FATAL_STATE(pm_state) …
#define MHI_DB_ACCESS_VALID(mhi_cntrl) …
#define MHI_WAKE_DB_CLEAR_VALID(pm_state) …
#define MHI_WAKE_DB_SET_VALID(pm_state) …
#define MHI_WAKE_DB_FORCE_SET_VALID(pm_state) …
#define MHI_EVENT_ACCESS_INVALID(pm_state) …
#define MHI_PM_IN_SUSPEND_STATE(pm_state) …
#define NR_OF_CMD_RINGS …
#define CMD_EL_PER_RING …
#define PRIMARY_CMD_RING …
#define MHI_DEV_WAKE_DB …
#define MHI_MAX_MTU …
#define MHI_RANDOM_U32_NONZERO(bmsk) …
enum mhi_er_type { … };
struct db_cfg { … };
struct mhi_pm_transitions { … };
struct state_transition { … };
struct mhi_ring { … };
struct mhi_cmd { … };
struct mhi_buf_info { … };
struct mhi_event { … };
struct mhi_chan { … };
#define MHI_TIMEOUT_MS …
#ifdef CONFIG_MHI_BUS_DEBUG
void mhi_create_debugfs(struct mhi_controller *mhi_cntrl);
void mhi_destroy_debugfs(struct mhi_controller *mhi_cntrl);
void mhi_debugfs_init(void);
void mhi_debugfs_exit(void);
#else
static inline void mhi_create_debugfs(struct mhi_controller *mhi_cntrl)
{
}
static inline void mhi_destroy_debugfs(struct mhi_controller *mhi_cntrl)
{
}
static inline void mhi_debugfs_init(void)
{
}
static inline void mhi_debugfs_exit(void)
{
}
#endif
struct mhi_device *mhi_alloc_device(struct mhi_controller *mhi_cntrl);
int mhi_destroy_device(struct device *dev, void *data);
void mhi_create_devices(struct mhi_controller *mhi_cntrl);
int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl,
struct image_info **image_info, size_t alloc_size);
void mhi_free_bhie_table(struct mhi_controller *mhi_cntrl,
struct image_info *image_info);
enum mhi_pm_state __must_check mhi_tryset_pm_state(
struct mhi_controller *mhi_cntrl,
enum mhi_pm_state state);
const char *to_mhi_pm_state_str(u32 state);
int mhi_queue_state_transition(struct mhi_controller *mhi_cntrl,
enum dev_st_transition state);
void mhi_pm_st_worker(struct work_struct *work);
void mhi_pm_sys_err_handler(struct mhi_controller *mhi_cntrl);
int mhi_ready_state_transition(struct mhi_controller *mhi_cntrl);
int mhi_pm_m0_transition(struct mhi_controller *mhi_cntrl);
void mhi_pm_m1_transition(struct mhi_controller *mhi_cntrl);
int mhi_pm_m3_transition(struct mhi_controller *mhi_cntrl);
int __mhi_device_get_sync(struct mhi_controller *mhi_cntrl);
int mhi_send_cmd(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
enum mhi_cmd_type cmd);
int mhi_download_amss_image(struct mhi_controller *mhi_cntrl);
static inline bool mhi_is_active(struct mhi_controller *mhi_cntrl)
{ … }
static inline void mhi_trigger_resume(struct mhi_controller *mhi_cntrl)
{ … }
void mhi_db_brstmode(struct mhi_controller *mhi_cntrl, struct db_cfg *db_cfg,
void __iomem *db_addr, dma_addr_t db_val);
void mhi_db_brstmode_disable(struct mhi_controller *mhi_cntrl,
struct db_cfg *db_mode, void __iomem *db_addr,
dma_addr_t db_val);
int __must_check mhi_read_reg(struct mhi_controller *mhi_cntrl,
void __iomem *base, u32 offset, u32 *out);
int __must_check mhi_read_reg_field(struct mhi_controller *mhi_cntrl,
void __iomem *base, u32 offset, u32 mask,
u32 *out);
int __must_check mhi_poll_reg_field(struct mhi_controller *mhi_cntrl,
void __iomem *base, u32 offset, u32 mask,
u32 val, u32 delayus, u32 timeout_ms);
void mhi_write_reg(struct mhi_controller *mhi_cntrl, void __iomem *base,
u32 offset, u32 val);
int __must_check mhi_write_reg_field(struct mhi_controller *mhi_cntrl,
void __iomem *base, u32 offset, u32 mask,
u32 val);
void mhi_ring_er_db(struct mhi_event *mhi_event);
void mhi_write_db(struct mhi_controller *mhi_cntrl, void __iomem *db_addr,
dma_addr_t db_val);
void mhi_ring_cmd_db(struct mhi_controller *mhi_cntrl, struct mhi_cmd *mhi_cmd);
void mhi_ring_chan_db(struct mhi_controller *mhi_cntrl,
struct mhi_chan *mhi_chan);
int mhi_init_mmio(struct mhi_controller *mhi_cntrl);
int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl);
void mhi_deinit_dev_ctxt(struct mhi_controller *mhi_cntrl);
int mhi_init_irq_setup(struct mhi_controller *mhi_cntrl);
void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl);
int mhi_rddm_prepare(struct mhi_controller *mhi_cntrl,
struct image_info *img_info);
void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl);
#define MHI_CH_INBOUND_ALLOC_BUFS …
int mhi_prepare_channel(struct mhi_controller *mhi_cntrl,
struct mhi_chan *mhi_chan, unsigned int flags);
int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl,
struct mhi_chan *mhi_chan);
void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl,
struct mhi_chan *mhi_chan);
void mhi_reset_chan(struct mhi_controller *mhi_cntrl,
struct mhi_chan *mhi_chan);
void mhi_ctrl_ev_task(unsigned long data);
void mhi_ev_task(unsigned long data);
int mhi_process_data_event_ring(struct mhi_controller *mhi_cntrl,
struct mhi_event *mhi_event, u32 event_quota);
int mhi_process_ctrl_ev_ring(struct mhi_controller *mhi_cntrl,
struct mhi_event *mhi_event, u32 event_quota);
irqreturn_t mhi_irq_handler(int irq_number, void *dev);
irqreturn_t mhi_intvec_threaded_handler(int irq_number, void *dev);
irqreturn_t mhi_intvec_handler(int irq_number, void *dev);
int mhi_gen_tre(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan,
struct mhi_buf_info *info, enum mhi_flags flags);
int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl,
struct mhi_buf_info *buf_info);
int mhi_map_single_use_bb(struct mhi_controller *mhi_cntrl,
struct mhi_buf_info *buf_info);
void mhi_unmap_single_no_bb(struct mhi_controller *mhi_cntrl,
struct mhi_buf_info *buf_info);
void mhi_unmap_single_use_bb(struct mhi_controller *mhi_cntrl,
struct mhi_buf_info *buf_info);
#endif