linux/drivers/phy/amlogic/phy-meson8-hdmi-tx.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Meson8, Meson8b and Meson8m2 HDMI TX PHY.
 *
 * Copyright (C) 2021 Martin Blumenstingl <[email protected]>
 */

#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/property.h>
#include <linux/regmap.h>

/*
 * Unfortunately there is no detailed documentation available for the
 * HHI_HDMI_PHY_CNTL0 register. CTL0 and CTL1 is all we know about.
 * Magic register values in the driver below are taken from the vendor
 * BSP / kernel.
 */
#define HHI_HDMI_PHY_CNTL0 …
	#define HHI_HDMI_PHY_CNTL0_HDMI_CTL1 …
	#define HHI_HDMI_PHY_CNTL0_HDMI_CTL0 …

#define HHI_HDMI_PHY_CNTL1 …
	#define HHI_HDMI_PHY_CNTL1_CLOCK_ENABLE …
	#define HHI_HDMI_PHY_CNTL1_SOFT_RESET …

#define HHI_HDMI_PHY_CNTL2 …

struct phy_meson8_hdmi_tx_priv { … };

static int phy_meson8_hdmi_tx_init(struct phy *phy)
{ … }

static int phy_meson8_hdmi_tx_exit(struct phy *phy)
{ … }

static int phy_meson8_hdmi_tx_power_on(struct phy *phy)
{ … }

static int phy_meson8_hdmi_tx_power_off(struct phy *phy)
{ … }

static const struct phy_ops phy_meson8_hdmi_tx_ops = …;

static int phy_meson8_hdmi_tx_probe(struct platform_device *pdev)
{ … }

static const struct of_device_id phy_meson8_hdmi_tx_of_match[] = …;
MODULE_DEVICE_TABLE(of, phy_meson8_hdmi_tx_of_match);

static struct platform_driver phy_meson8_hdmi_tx_driver = …;
module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;