// SPDX-License-Identifier: GPL-2.0+ /* * Copyright 2017,2018 NXP * Copyright 2019 Purism SPC */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/clk-provider.h> #include <linux/delay.h> #include <linux/firmware/imx/ipc.h> #include <linux/firmware/imx/svc/misc.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/mfd/syscon.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/phy/phy.h> #include <linux/platform_device.h> #include <linux/regmap.h> #include <dt-bindings/firmware/imx/rsrc.h> /* Control and Status Registers(CSR) */ #define PHY_CTRL … #define CCM_MASK … #define CCM(n) … #define CCM_1_2V … #define CA_MASK … #define CA_3_51MA … #define CA(n) … #define RFB … #define LVDS_EN … /* DPHY registers */ #define DPHY_PD_DPHY … #define DPHY_M_PRG_HS_PREPARE … #define DPHY_MC_PRG_HS_PREPARE … #define DPHY_M_PRG_HS_ZERO … #define DPHY_MC_PRG_HS_ZERO … #define DPHY_M_PRG_HS_TRAIL … #define DPHY_MC_PRG_HS_TRAIL … #define DPHY_PD_PLL … #define DPHY_TST … #define DPHY_CN … #define DPHY_CM … #define DPHY_CO … #define DPHY_LOCK … #define DPHY_LOCK_BYP … #define DPHY_REG_BYPASS_PLL … #define MBPS(x) … #define DATA_RATE_MAX_SPEED … #define DATA_RATE_MIN_SPEED … #define PLL_LOCK_SLEEP … #define PLL_LOCK_TIMEOUT … #define CN_BUF … #define CO_BUF … #define CM(x) … #define CN(x) … #define CO(x) … /* PHY power on is active low */ #define PWR_ON … #define PWR_OFF … #define MIN_VCO_FREQ … #define MAX_VCO_FREQ … #define MIN_LVDS_REFCLK_FREQ … #define MAX_LVDS_REFCLK_FREQ … enum mixel_dphy_devtype { … }; struct mixel_dphy_devdata { … }; static const struct mixel_dphy_devdata mixel_dphy_devdata[] = …; struct mixel_dphy_cfg { … }; struct mixel_dphy_priv { … }; static const struct regmap_config mixel_dphy_regmap_config = …; static int phy_write(struct phy *phy, u32 value, unsigned int reg) { … } /* * Find a ratio close to the desired one using continued fraction * approximation ending either at exact match or maximum allowed * nominator, denominator. */ static void get_best_ratio(u32 *pnum, u32 *pdenom, u32 max_n, u32 max_d) { … } static int mixel_dphy_config_from_opts(struct phy *phy, struct phy_configure_opts_mipi_dphy *dphy_opts, struct mixel_dphy_cfg *cfg) { … } static void mixel_phy_set_hs_timings(struct phy *phy) { … } static int mixel_dphy_set_pll_params(struct phy *phy) { … } static int mixel_dphy_configure_mipi_dphy(struct phy *phy, union phy_configure_opts *opts) { … } static int mixel_dphy_configure_lvds_phy(struct phy *phy, union phy_configure_opts *opts) { … } static int mixel_dphy_configure(struct phy *phy, union phy_configure_opts *opts) { … } static int mixel_dphy_validate_lvds_phy(struct phy *phy, union phy_configure_opts *opts) { … } static int mixel_dphy_validate(struct phy *phy, enum phy_mode mode, int submode, union phy_configure_opts *opts) { … } static int mixel_dphy_init(struct phy *phy) { … } static int mixel_dphy_exit(struct phy *phy) { … } static int mixel_dphy_power_on_mipi_dphy(struct phy *phy) { … } static int mixel_dphy_power_on_lvds_phy(struct phy *phy) { … } static int mixel_dphy_power_on(struct phy *phy) { … } static int mixel_dphy_power_off(struct phy *phy) { … } static int mixel_dphy_set_mode(struct phy *phy, enum phy_mode mode, int submode) { … } static const struct phy_ops mixel_dphy_phy_ops = …; static const struct of_device_id mixel_dphy_of_match[] = …; MODULE_DEVICE_TABLE(of, mixel_dphy_of_match); static int mixel_dphy_probe(struct platform_device *pdev) { … } static struct platform_driver mixel_dphy_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
Codebase Browser
linux