linux/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-com-v3.h


/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_QSERDES_COM_V3_H_
#define QCOM_PHY_QMP_QSERDES_COM_V3_H_

/* Only for QMP V3 PHY - QSERDES COM registers */
#define QSERDES_V3_COM_ATB_SEL1
#define QSERDES_V3_COM_ATB_SEL2
#define QSERDES_V3_COM_FREQ_UPDATE
#define QSERDES_V3_COM_BG_TIMER
#define QSERDES_V3_COM_SSC_EN_CENTER
#define QSERDES_V3_COM_SSC_ADJ_PER1
#define QSERDES_V3_COM_SSC_ADJ_PER2
#define QSERDES_V3_COM_SSC_PER1
#define QSERDES_V3_COM_SSC_PER2
#define QSERDES_V3_COM_SSC_STEP_SIZE1
#define QSERDES_V3_COM_SSC_STEP_SIZE2
#define QSERDES_V3_COM_POST_DIV
#define QSERDES_V3_COM_POST_DIV_MUX
#define QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN
#define QSERDES_V3_COM_CLK_ENABLE1
#define QSERDES_V3_COM_SYS_CLK_CTRL
#define QSERDES_V3_COM_SYSCLK_BUF_ENABLE
#define QSERDES_V3_COM_PLL_EN
#define QSERDES_V3_COM_PLL_IVCO
#define QSERDES_V3_COM_CMN_IETRIM
#define QSERDES_V3_COM_CMN_IPTRIM
#define QSERDES_V3_COM_EP_CLOCK_DETECT_CTR
#define QSERDES_V3_COM_SYSCLK_DET_COMP_STATUS
#define QSERDES_V3_COM_CLK_EP_DIV
#define QSERDES_V3_COM_CP_CTRL_MODE0
#define QSERDES_V3_COM_CP_CTRL_MODE1
#define QSERDES_V3_COM_PLL_RCTRL_MODE0
#define QSERDES_V3_COM_PLL_RCTRL_MODE1
#define QSERDES_V3_COM_PLL_CCTRL_MODE0
#define QSERDES_V3_COM_PLL_CCTRL_MODE1
#define QSERDES_V3_COM_PLL_CNTRL
#define QSERDES_V3_COM_BIAS_EN_CTRL_BY_PSM
#define QSERDES_V3_COM_SYSCLK_EN_SEL
#define QSERDES_V3_COM_CML_SYSCLK_SEL
#define QSERDES_V3_COM_RESETSM_CNTRL
#define QSERDES_V3_COM_RESETSM_CNTRL2
#define QSERDES_V3_COM_LOCK_CMP_EN
#define QSERDES_V3_COM_LOCK_CMP_CFG
#define QSERDES_V3_COM_LOCK_CMP1_MODE0
#define QSERDES_V3_COM_LOCK_CMP2_MODE0
#define QSERDES_V3_COM_LOCK_CMP3_MODE0
#define QSERDES_V3_COM_LOCK_CMP1_MODE1
#define QSERDES_V3_COM_LOCK_CMP2_MODE1
#define QSERDES_V3_COM_LOCK_CMP3_MODE1
#define QSERDES_V3_COM_DEC_START_MODE0
#define QSERDES_V3_COM_DEC_START_MODE1
#define QSERDES_V3_COM_DIV_FRAC_START1_MODE0
#define QSERDES_V3_COM_DIV_FRAC_START2_MODE0
#define QSERDES_V3_COM_DIV_FRAC_START3_MODE0
#define QSERDES_V3_COM_DIV_FRAC_START1_MODE1
#define QSERDES_V3_COM_DIV_FRAC_START2_MODE1
#define QSERDES_V3_COM_DIV_FRAC_START3_MODE1
#define QSERDES_V3_COM_INTEGLOOP_INITVAL
#define QSERDES_V3_COM_INTEGLOOP_EN
#define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE0
#define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE0
#define QSERDES_V3_COM_INTEGLOOP_GAIN0_MODE1
#define QSERDES_V3_COM_INTEGLOOP_GAIN1_MODE1
#define QSERDES_V3_COM_VCOCAL_DEADMAN_CTRL
#define QSERDES_V3_COM_VCO_TUNE_CTRL
#define QSERDES_V3_COM_VCO_TUNE_MAP
#define QSERDES_V3_COM_VCO_TUNE1_MODE0
#define QSERDES_V3_COM_VCO_TUNE2_MODE0
#define QSERDES_V3_COM_VCO_TUNE1_MODE1
#define QSERDES_V3_COM_VCO_TUNE2_MODE1
#define QSERDES_V3_COM_VCO_TUNE_INITVAL1
#define QSERDES_V3_COM_VCO_TUNE_INITVAL2
#define QSERDES_V3_COM_VCO_TUNE_MINVAL1
#define QSERDES_V3_COM_VCO_TUNE_MINVAL2
#define QSERDES_V3_COM_VCO_TUNE_MAXVAL1
#define QSERDES_V3_COM_VCO_TUNE_MAXVAL2
#define QSERDES_V3_COM_VCO_TUNE_TIMER1
#define QSERDES_V3_COM_VCO_TUNE_TIMER2
#define QSERDES_V3_COM_CMN_STATUS
#define QSERDES_V3_COM_RESET_SM_STATUS
#define QSERDES_V3_COM_RESTRIM_CODE_STATUS
#define QSERDES_V3_COM_PLLCAL_CODE1_STATUS
#define QSERDES_V3_COM_PLLCAL_CODE2_STATUS
#define QSERDES_V3_COM_CLK_SELECT
#define QSERDES_V3_COM_HSCLK_SEL
#define QSERDES_V3_COM_INTEGLOOP_BINCODE_STATUS
#define QSERDES_V3_COM_PLL_ANALOG
#define QSERDES_V3_COM_CORECLK_DIV_MODE0
#define QSERDES_V3_COM_CORECLK_DIV_MODE1
#define QSERDES_V3_COM_SW_RESET
#define QSERDES_V3_COM_CORE_CLK_EN
#define QSERDES_V3_COM_C_READY_STATUS
#define QSERDES_V3_COM_CMN_CONFIG
#define QSERDES_V3_COM_CMN_RATE_OVERRIDE
#define QSERDES_V3_COM_SVS_MODE_CLK_SEL
#define QSERDES_V3_COM_DEBUG_BUS0
#define QSERDES_V3_COM_DEBUG_BUS1
#define QSERDES_V3_COM_DEBUG_BUS2
#define QSERDES_V3_COM_DEBUG_BUS3
#define QSERDES_V3_COM_DEBUG_BUS_SEL
#define QSERDES_V3_COM_CMN_MISC1
#define QSERDES_V3_COM_CMN_MISC2
#define QSERDES_V3_COM_CMN_MODE
#define QSERDES_V3_COM_CMN_VREG_SEL

#endif