#ifndef QCOM_PHY_QMP_PCS_V2_H_
#define QCOM_PHY_QMP_PCS_V2_H_
#define QPHY_V2_PCS_SW_RESET …
#define QPHY_V2_PCS_POWER_DOWN_CONTROL …
#define QPHY_V2_PCS_START_CONTROL …
#define QPHY_V2_PCS_TXDEEMPH_M6DB_V0 …
#define QPHY_V2_PCS_TXDEEMPH_M3P5DB_V0 …
#define QPHY_V2_PCS_ENDPOINT_REFCLK_DRIVE …
#define QPHY_V2_PCS_RX_IDLE_DTCT_CNTRL …
#define QPHY_V2_PCS_POWER_STATE_CONFIG1 …
#define QPHY_V2_PCS_POWER_STATE_CONFIG2 …
#define QPHY_V2_PCS_POWER_STATE_CONFIG4 …
#define QPHY_V2_PCS_LOCK_DETECT_CONFIG1 …
#define QPHY_V2_PCS_LOCK_DETECT_CONFIG2 …
#define QPHY_V2_PCS_LOCK_DETECT_CONFIG3 …
#define QPHY_V2_PCS_PWRUP_RESET_DLY_TIME_AUXCLK …
#define QPHY_V2_PCS_LP_WAKEUP_DLY_TIME_AUXCLK …
#define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME …
#define QPHY_V2_PCS_FLL_CNTRL1 …
#define QPHY_V2_PCS_FLL_CNTRL2 …
#define QPHY_V2_PCS_FLL_CNT_VAL_L …
#define QPHY_V2_PCS_FLL_CNT_VAL_H_TOL …
#define QPHY_V2_PCS_FLL_MAN_CODE …
#define QPHY_V2_PCS_AUTONOMOUS_MODE_CTRL …
#define QPHY_V2_PCS_LFPS_RXTERM_IRQ_CLEAR …
#define QPHY_V2_PCS_LFPS_RXTERM_IRQ_STATUS …
#define QPHY_V2_PCS_USB_PCS_STATUS …
#define QPHY_V2_PCS_PLL_LOCK_CHK_DLY_TIME_AUXCLK_LSB …
#define QPHY_V2_PCS_OSC_DTCT_ACTIONS …
#define QPHY_V2_PCS_RX_SIGDET_LVL …
#define QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_LSB …
#define QPHY_V2_PCS_L1SS_WAKEUP_DLY_TIME_AUXCLK_MSB …
#define QPHY_V2_PCS_PCI_PCS_STATUS …
#endif